| Message ID | 1431012969-16338-3-git-send-email-ivan.ivanov@linaro.org |
|---|---|
| State | New |
| Headers | show |
On 7 May 2015 at 09:36, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote: > Add initial set of CoreSight components found on Qualcomm's 8x16 chipset. > > Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> > --- > arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi | 254 ++++++++++++++++++++++++ > 1 file changed, 254 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi > > diff --git a/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi > new file mode 100644 > index 0000000..33ae981 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi > @@ -0,0 +1,254 @@ > +/* > + * Copyright (c) 2013 - 2015, The Linux Foundation. All rights reserved. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 and > + * only version 2 as published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +&soc { > + > + tpiu@820000 { > + compatible = "arm,coresight-tpiu", "arm,primecell"; > + reg = <0x820000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + port { > + tpiu_in: endpoint { > + slave-mode; > + remote-endpoint = <&replicator_out1>; > + }; > + }; > + }; > + > + funnel@821000 { > + compatible = "arm,coresight-funnel", "arm,primecell"; > + reg = <0x821000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + /* > + * Not described input ports: > + * 0 - connected to Resource and Power Manger CPU ETM > + * 1 - not-connected > + * 2 - connected to Modem CPU ETM > + * 3 - not-connected > + * 5 - not-connected > + * 6 - connected trought funnel to Wireless CPU ETM > + * 7 - connected to STM component > + */ > + port@4 { > + reg = <4>; > + funnel0_in4: endpoint { > + slave-mode; > + remote-endpoint = <&funnel1_out>; > + }; > + }; > + port@8 { > + reg = <0>; > + funnel0_out: endpoint { > + remote-endpoint = <&etf_in>; > + }; > + }; > + }; > + }; > + > + replicator@824000 { > + compatible = "qcom,coresight-replicator", "arm,primecell"; Shouldn't it be "qcom,coresight-replicator1x" ? > + reg = <0x824000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + replicator_out0: endpoint { > + remote-endpoint = <&etr_in>; > + }; > + }; > + port@1 { > + reg = <1>; > + replicator_out1: endpoint { > + remote-endpoint = <&tpiu_in>; > + }; > + }; > + port@2 { > + reg = <0>; > + replicator_in: endpoint { > + slave-mode; > + remote-endpoint = <&etf_out>; > + }; > + }; > + }; > + }; > + > + etf@825000 { > + compatible = "arm,coresight-tmc", "arm,primecell"; > + reg = <0x825000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + etf_out: endpoint { > + slave-mode; > + remote-endpoint = <&funnel0_out>; > + }; > + }; > + port@1 { > + reg = <0>; > + etf_in: endpoint { > + remote-endpoint = <&replicator_in>; > + }; > + }; > + }; > + }; > + > + etr@826000 { > + compatible = "arm,coresight-tmc", "arm,primecell"; > + reg = <0x826000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + port { > + etr_in: endpoint { > + slave-mode; > + remote-endpoint = <&replicator_out0>; > + }; > + }; > + }; > + > + funnel@841000 { /* APSS funnel only 4 inputs are used */ > + compatible = "arm,coresight-funnel", "arm,primecell"; > + reg = <0x841000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + funnel1_in0: endpoint { > + slave-mode; > + remote-endpoint = <&etm0_out>; > + }; > + }; > + port@1 { > + reg = <1>; > + funnel1_in1: endpoint { > + slave-mode; > + remote-endpoint = <&etm1_out>; > + }; > + }; > + port@2 { > + reg = <2>; > + funnel1_in2: endpoint { > + slave-mode; > + remote-endpoint = <&etm2_out>; > + }; > + }; > + port@3 { > + reg = <3>; > + funnel1_in3: endpoint { > + slave-mode; > + remote-endpoint = <&etm3_out>; > + }; > + }; > + port@4 { > + reg = <0>; > + funnel1_out: endpoint { > + remote-endpoint = <&funnel0_in4>; > + }; > + }; > + }; > + }; > + > + etm@85c000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0x85c000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + cpu = <&CPU0>; > + > + port { > + etm0_out: endpoint { > + remote-endpoint = <&funnel1_in0>; > + }; > + }; > + }; > + > + etm@85d000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0x85d000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + cpu = <&CPU1>; > + > + port { > + etm1_out: endpoint { > + remote-endpoint = <&funnel1_in1>; > + }; > + }; > + }; > + > + etm@85e000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0x85e000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + cpu = <&CPU2>; > + > + port { > + etm2_out: endpoint { > + remote-endpoint = <&funnel1_in2>; > + }; > + }; > + }; > + > + etm@85f000 { > + compatible = "arm,coresight-etm4x", "arm,primecell"; > + reg = <0x85f000 0x1000>; > + > + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; > + clock-names = "apb_pclk", "atclk"; > + > + cpu = <&CPU3>; > + > + port { > + etm3_out: endpoint { > + remote-endpoint = <&funnel1_in3>; > + }; > + }; > + }; > +}; > -- > 1.9.1 > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, 2015-05-08 at 07:38 -0600, Mathieu Poirier wrote: > On 7 May 2015 at 09:36, Ivan T. Ivanov ivanov@linaro.org> wrote: > > Add initial set of CoreSight components found on Qualcomm's 8x16 chipset. > > > > > > + replicator@824000 { > > + compatible = "qcom,coresight-replicator", "arm,primecell"; > > Shouldn't it be "qcom,coresight-replicator1x" ? > True, I still wonder, why we have to have this compatible string? Drivers are probed by amba_id and "arm,primecell", after all. Thanks, Ivan -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 8 May 2015 at 07:47, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote: > > On Fri, 2015-05-08 at 07:38 -0600, Mathieu Poirier wrote: >> On 7 May 2015 at 09:36, Ivan T. Ivanov ivanov@linaro.org> wrote: >> > Add initial set of CoreSight components found on Qualcomm's 8x16 chipset. >> > >> > >> > + replicator@824000 { >> > + compatible = "qcom,coresight-replicator", "arm,primecell"; >> >> Shouldn't it be "qcom,coresight-replicator1x" ? >> > > > > True, I still wonder, why we have to have this compatible string? > Drivers are probed by amba_id and "arm,primecell", after all. > Drivers have their own compatible strings for historical reasons, something I've been meaning to fix for a long time now... > Thanks, > Ivan -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, 2015-05-08 at 08:13 -0600, Mathieu Poirier wrote: > On 8 May 2015 at 07:47, Ivan T. Ivanov ivanov@linaro.org> wrote: > > On Fri, 2015-05-08 at 07:38 -0600, Mathieu Poirier wrote: > > > On 7 May 2015 at 09:36, Ivan T. Ivanov ivanov@linaro.org> wrote: > > > > Add initial set of CoreSight components found on Qualcomm's 8x16 chipset. > > > > > > > > > > > > + replicator@824000 { > > > > + compatible = "qcom,coresight-replicator", "arm,primecell"; > > > > > > Shouldn't it be "qcom,coresight-replicator1x" ? > > > > > > > > > > > True, I still wonder, why we have to have this compatible string? > > Drivers are probed by amba_id and "arm,primecell", after all. > > > > Drivers have their own compatible strings for historical reasons, > something I've been meaning to fix for a long time now... > Yep, I see that they have been platform drivers in the past, but now they are not, except coresight-replicator driver. IMHO, having additional compatible string could lead just to confusion. Regards, Ivan -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 8 May 2015 at 08:17, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote: > > On Fri, 2015-05-08 at 08:13 -0600, Mathieu Poirier wrote: >> On 8 May 2015 at 07:47, Ivan T. Ivanov ivanov@linaro.org> wrote: >> > On Fri, 2015-05-08 at 07:38 -0600, Mathieu Poirier wrote: >> > > On 7 May 2015 at 09:36, Ivan T. Ivanov ivanov@linaro.org> wrote: >> > > > Add initial set of CoreSight components found on Qualcomm's 8x16 chipset. >> > > > >> > > > >> > > > + replicator@824000 { >> > > > + compatible = "qcom,coresight-replicator", "arm,primecell"; >> > > >> > > Shouldn't it be "qcom,coresight-replicator1x" ? >> > > >> > >> > >> > >> > True, I still wonder, why we have to have this compatible string? >> > Drivers are probed by amba_id and "arm,primecell", after all. >> > >> >> Drivers have their own compatible strings for historical reasons, >> something I've been meaning to fix for a long time now... >> > > Yep, I see that they have been platform drivers in the past, but now > they are not, except coresight-replicator driver. IMHO, having > additional compatible string could lead just to confusion. I did a little more research on this and based on what I found in the kernel it may not need "fixing" after all. The majority of drivers that do specify "arm,primecell" also specify a device-specific compatible string. And in the case of CoreSight devices were implementers can do pretty much whatever they want with the ID strings, it is only a matter of time before we need to call something like of_device_is_compatible() to fix a quirk. Unless someone heavy asks to remove the device-specific compatible strings I'd prefer keeping the current trend set forth by other drivers and as such, will ask you to add the "1x" in this bindings. Thanks, Mathieu > > Regards, > Ivan -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
> On May 8, 2015, at 7:17 PM, Mathieu Poirier <mathieu.poirier@linaro.org> wrote: > > On 8 May 2015 at 08:17, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote: >> >> On Fri, 2015-05-08 at 08:13 -0600, Mathieu Poirier wrote: >>> On 8 May 2015 at 07:47, Ivan T. Ivanov ivanov@linaro.org> wrote: >>>> On Fri, 2015-05-08 at 07:38 -0600, Mathieu Poirier wrote: >>>>> On 7 May 2015 at 09:36, Ivan T. Ivanov ivanov@linaro.org> wrote: >>>>>> Add initial set of CoreSight components found on Qualcomm's 8x16 chipset. >>>>>> >>>>>> >>>>>> + replicator@824000 { >>>>>> + compatible = "qcom,coresight-replicator", "arm,primecell"; >>>>> >>>>> Shouldn't it be "qcom,coresight-replicator1x" ? >>>>> >>>> >>>> >>>> >>>> True, I still wonder, why we have to have this compatible string? >>>> Drivers are probed by amba_id and "arm,primecell", after all. >>>> >>> >>> Drivers have their own compatible strings for historical reasons, >>> something I've been meaning to fix for a long time now... >>> >> >> Yep, I see that they have been platform drivers in the past, but now >> they are not, except coresight-replicator driver. IMHO, having >> additional compatible string could lead just to confusion. > > I did a little more research on this and based on what I found in the > kernel it may not need "fixing" after all. The majority of drivers > that do specify "arm,primecell" also specify a device-specific > compatible string. And in the case of CoreSight devices were > implementers can do pretty much whatever they want with the ID > strings, it is only a matter of time before we need to call something > like of_device_is_compatible() to fix a quirk. > > Unless someone heavy asks to remove the device-specific compatible > strings I'd prefer keeping the current trend set forth by other > drivers and as such, will ask you to add the "1x" in this bindings. Well, I don’t strongly object against this “1x”, I will add it. My point is that if we can dynamically detect device version, which we can do in this case, it will be more robust to do it in this way. If there are not issues with patch 1/2, I will like to fix and resend only this patch. Regards, Ivan -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 8 May 2015 at 11:57, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote: > >> On May 8, 2015, at 7:17 PM, Mathieu Poirier <mathieu.poirier@linaro.org> wrote: >> >> On 8 May 2015 at 08:17, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote: >>> >>> On Fri, 2015-05-08 at 08:13 -0600, Mathieu Poirier wrote: >>>> On 8 May 2015 at 07:47, Ivan T. Ivanov ivanov@linaro.org> wrote: >>>>> On Fri, 2015-05-08 at 07:38 -0600, Mathieu Poirier wrote: >>>>>> On 7 May 2015 at 09:36, Ivan T. Ivanov ivanov@linaro.org> wrote: >>>>>>> Add initial set of CoreSight components found on Qualcomm's 8x16 chipset. >>>>>>> >>>>>>> >>>>>>> + replicator@824000 { >>>>>>> + compatible = "qcom,coresight-replicator", "arm,primecell"; >>>>>> >>>>>> Shouldn't it be "qcom,coresight-replicator1x" ? >>>>>> >>>>> >>>>> >>>>> >>>>> True, I still wonder, why we have to have this compatible string? >>>>> Drivers are probed by amba_id and "arm,primecell", after all. >>>>> >>>> >>>> Drivers have their own compatible strings for historical reasons, >>>> something I've been meaning to fix for a long time now... >>>> >>> >>> Yep, I see that they have been platform drivers in the past, but now >>> they are not, except coresight-replicator driver. IMHO, having >>> additional compatible string could lead just to confusion. >> >> I did a little more research on this and based on what I found in the >> kernel it may not need "fixing" after all. The majority of drivers >> that do specify "arm,primecell" also specify a device-specific >> compatible string. And in the case of CoreSight devices were >> implementers can do pretty much whatever they want with the ID >> strings, it is only a matter of time before we need to call something >> like of_device_is_compatible() to fix a quirk. >> >> Unless someone heavy asks to remove the device-specific compatible >> strings I'd prefer keeping the current trend set forth by other >> drivers and as such, will ask you to add the "1x" in this bindings. > > > Well, I don’t strongly object against this “1x”, I will add it. > My point is that if we can dynamically detect device version, > which we can do in this case, it will be more robust to do it > in this way. I agree with you. The device specific bindings will come handy when there is a problem with the device version, something that is bound to happen. > > If there are not issues with patch 1/2, I will like to fix and > resend only this patch. I'm good with 1/2, just this patch will be fine. > > Regards, > Ivan > > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
> On May 8, 2015, at 9:00 PM, Mark Rutland <mark.rutland@arm.com> wrote: > > On Fri, May 08, 2015 at 02:47:57PM +0100, Ivan T. Ivanov wrote: >> >> On Fri, 2015-05-08 at 07:38 -0600, Mathieu Poirier wrote: >>> On 7 May 2015 at 09:36, Ivan T. Ivanov ivanov@linaro.org> wrote: >>>> Add initial set of CoreSight components found on Qualcomm's 8x16 chipset. >>>> >>>> >>>> + replicator@824000 { >>>> + compatible = "qcom,coresight-replicator", "arm,primecell"; >>> >>> Shouldn't it be "qcom,coresight-replicator1x" ? >>> >> >> >> >> True, I still wonder, why we have to have this compatible string? >> Drivers are probed by amba_id and "arm,primecell", after all. > > The compatible string tells you both the device _and_ the format of the > other properties, because it tells you which binding applies. > > So the compatible string should be present regardless, as > "arm,primecell" does not define the majority of the properties you need > for the replicator node. Mmm, only if vendors don’t bother to update version information fused to revision id registers, which happens. And this could be workaround by "arm,primecell-periphid”, no? Regards, Ivan-- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi new file mode 100644 index 0000000..33ae981 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi @@ -0,0 +1,254 @@ +/* + * Copyright (c) 2013 - 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + + tpiu@820000 { + compatible = "arm,coresight-tpiu", "arm,primecell"; + reg = <0x820000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + port { + tpiu_in: endpoint { + slave-mode; + remote-endpoint = <&replicator_out1>; + }; + }; + }; + + funnel@821000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x821000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* + * Not described input ports: + * 0 - connected to Resource and Power Manger CPU ETM + * 1 - not-connected + * 2 - connected to Modem CPU ETM + * 3 - not-connected + * 5 - not-connected + * 6 - connected trought funnel to Wireless CPU ETM + * 7 - connected to STM component + */ + port@4 { + reg = <4>; + funnel0_in4: endpoint { + slave-mode; + remote-endpoint = <&funnel1_out>; + }; + }; + port@8 { + reg = <0>; + funnel0_out: endpoint { + remote-endpoint = <&etf_in>; + }; + }; + }; + }; + + replicator@824000 { + compatible = "qcom,coresight-replicator", "arm,primecell"; + reg = <0x824000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + replicator_out0: endpoint { + remote-endpoint = <&etr_in>; + }; + }; + port@1 { + reg = <1>; + replicator_out1: endpoint { + remote-endpoint = <&tpiu_in>; + }; + }; + port@2 { + reg = <0>; + replicator_in: endpoint { + slave-mode; + remote-endpoint = <&etf_out>; + }; + }; + }; + }; + + etf@825000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0x825000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + etf_out: endpoint { + slave-mode; + remote-endpoint = <&funnel0_out>; + }; + }; + port@1 { + reg = <0>; + etf_in: endpoint { + remote-endpoint = <&replicator_in>; + }; + }; + }; + }; + + etr@826000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0x826000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + port { + etr_in: endpoint { + slave-mode; + remote-endpoint = <&replicator_out0>; + }; + }; + }; + + funnel@841000 { /* APSS funnel only 4 inputs are used */ + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0x841000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel1_in0: endpoint { + slave-mode; + remote-endpoint = <&etm0_out>; + }; + }; + port@1 { + reg = <1>; + funnel1_in1: endpoint { + slave-mode; + remote-endpoint = <&etm1_out>; + }; + }; + port@2 { + reg = <2>; + funnel1_in2: endpoint { + slave-mode; + remote-endpoint = <&etm2_out>; + }; + }; + port@3 { + reg = <3>; + funnel1_in3: endpoint { + slave-mode; + remote-endpoint = <&etm3_out>; + }; + }; + port@4 { + reg = <0>; + funnel1_out: endpoint { + remote-endpoint = <&funnel0_in4>; + }; + }; + }; + }; + + etm@85c000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0x85c000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + cpu = <&CPU0>; + + port { + etm0_out: endpoint { + remote-endpoint = <&funnel1_in0>; + }; + }; + }; + + etm@85d000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0x85d000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + cpu = <&CPU1>; + + port { + etm1_out: endpoint { + remote-endpoint = <&funnel1_in1>; + }; + }; + }; + + etm@85e000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0x85e000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + cpu = <&CPU2>; + + port { + etm2_out: endpoint { + remote-endpoint = <&funnel1_in2>; + }; + }; + }; + + etm@85f000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0x85f000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + cpu = <&CPU3>; + + port { + etm3_out: endpoint { + remote-endpoint = <&funnel1_in3>; + }; + }; + }; +};
Add initial set of CoreSight components found on Qualcomm's 8x16 chipset. Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi | 254 ++++++++++++++++++++++++ 1 file changed, 254 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/