[V5,2/3] OPP: Allow multiple OPP tables to be passed via DT

Message ID 4690ad854263d6553debab67d65d230105c206ec.1432091956.git.viresh.kumar@linaro.org
State New
Headers show

Commit Message

Viresh Kumar May 20, 2015, 3:41 a.m.
On some platforms (Like Qualcomm's SoCs), it is not decided until
runtime on what OPPs to use. The OPP tables can be fixed at compile
time, but which table to use is found out only after reading some efuses
(sort of an prom) and knowing characteristics of the SoC.

To support such platform we need to pass multiple OPP tables per device
and hardware should be able to choose one and only one table out of
those.

Update OPP-v2 bindings to support that.

Acked-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
 Documentation/devicetree/bindings/power/opp.txt | 52 +++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

Comments

Viresh Kumar May 21, 2015, 5:50 a.m. | #1
On 21-05-15, 00:34, Nishanth Menon wrote:
> On 05/19/2015 10:41 PM, Viresh Kumar wrote:
> Thinking a little more..

No issues. Will update that.
Viresh Kumar May 26, 2015, 4:51 a.m. | #2
On 21-05-15, 00:34, Nishanth Menon wrote:
> > +	cpu0_opp0: opp0 {
> 
> Maybe we should rename these as cpu0_opp_table_slow opp_table-fast
> 
> > +		compatible = "operating-points-v2";
> > +		opp-name = "opp-slow";
> 
> just name = "slow" ?
> 
> > +		opp-shared;
> > +
> > +		entry00 {
> 
> rename these as opp0, opp01 etc?
> these are the actual OPP description, while, what we call "cpu0_opp0" is
> actually an OPP table choice we have.

What about this now:
+Example 5: Multiple OPP tables
+
+/ {
+       cpus {
+               cpu@0 {
+                       compatible = "arm,cortex-a7";
+                       ...
+
+                       opp-supply = <&cpu_supply>
+                       operating-points-v2 = <&cpu0_opp_table_slow>, <&cpu0_opp_table_fast>;
+               };
+       };
+
+       cpu0_opp_table_slow: opp_table_slow {
+               compatible = "operating-points-v2";
+               opp-name = "slow";
+               opp-shared;
+
+               opp00 {
+                       opp-hz = <600000000>;
+                       ...
+               };
+
+               opp01 {
+                       opp-hz = <800000000>;
+                       ...
+               };
+       };
+
+       cpu0_opp_table_fast: opp_table_fast {
+               compatible = "operating-points-v2";
+               opp-name = "fast";
+               opp-shared;
+
+               opp10 {
+                       opp-hz = <1000000000>;
+                       ...
+               };
+
+               opp11 {
+                       opp-hz = <1100000000>;
+                       ...
+               };
+       };
+};

May I carry your Ack or you want to give it again?

Patch

diff --git a/Documentation/devicetree/bindings/power/opp.txt b/Documentation/devicetree/bindings/power/opp.txt
index d132e2927b21..7f30d9b07db7 100644
--- a/Documentation/devicetree/bindings/power/opp.txt
+++ b/Documentation/devicetree/bindings/power/opp.txt
@@ -46,6 +46,9 @@  Devices supporting OPPs must set their "operating-points-v2" property with
 phandle to a OPP descriptor in their DT node. The OPP core will use this phandle
 to find the operating points for the device.
 
+Devices may want to choose OPP tables at runtime and so can provide a list of
+phandles here. But only *one* of them should be chosen at runtime.
+
 
 * OPP Descriptor Node
 
@@ -61,6 +64,9 @@  This describes the OPPs belonging to a device. This node can have following
   reference an OPP.
 
 Optional properties:
+- opp-name: Name of the OPP table, to uniquely identify it if more than one OPP
+  table is supplied in "operating-points-v2" property of device.
+
 - opp-shared: Indicates that device nodes using this OPP descriptor's phandle
   switch their DVFS state together, i.e. they share clock/voltage/current lines.
   Missing property means devices have independent clock/voltage/current lines,
@@ -394,3 +400,49 @@  Example 4: Handling multiple regulators
 		};
 	};
 };
+
+Example 5: Multiple OPP tables
+
+/ {
+	cpus {
+		cpu@0 {
+			compatible = "arm,cortex-a7";
+			...
+
+			opp-supply = <&cpu_supply>
+			operating-points-v2 = <&cpu0_opp0>, <&cpu0_opp1>;
+		};
+	};
+
+	cpu0_opp0: opp0 {
+		compatible = "operating-points-v2";
+		opp-name = "opp-slow";
+		opp-shared;
+
+		entry00 {
+			opp-hz = <600000000>;
+			...
+		};
+
+		entry01 {
+			opp-hz = <800000000>;
+			...
+		};
+	};
+
+	cpu0_opp1: opp1 {
+		compatible = "operating-points-v2";
+		opp-name = "opp-fast";
+		opp-shared;
+
+		entry10 {
+			opp-hz = <1000000000>;
+			...
+		};
+
+		entry11 {
+			opp-hz = <1100000000>;
+			...
+		};
+	};
+};