From patchwork Thu Jun 18 10:54:16 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 50006 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f198.google.com (mail-wi0-f198.google.com [209.85.212.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 0455922905 for ; Thu, 18 Jun 2015 10:56:50 +0000 (UTC) Received: by wibdt2 with SMTP id dt2sf20726591wib.3 for ; Thu, 18 Jun 2015 03:56:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :in-reply-to:references:in-reply-to:references:mime-version :content-type:content-transfer-encoding:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=bOgi5xdj36R9ypOR+Amy9iZv2ISZr+7keIyJxltEJ+8=; b=SiMNiG1yYYnPm93eelnIvQ7yJSqV+YaX2kW0b+IUFmdDDDgwJ0QmzCRG9tVWDtL9On wHsrzmbBOMNW8KP/GnzFtru+hUbckMsfUmkfHTm8AUCj1MdJnZMrWhf1OmGvEQCy13Dk /nSMlw2lltnuhmufBn2+phfoJR9LOXjcIw5URoAbSJVHLhYgZ6+jBKp478zeekE3bAy9 qlCjjgW5yt8J7nSdVYQ46kpOIyrXrqAJj/wpzjHgt+MQ+SFFwE3Zdid6ttuYSm9uczjv s/tergWabD/5gnxDusl3cL1JXt9edaBDE8y0Se7WpTgqLpvIh3qOTjhbtGBtE1WVFoVt RdBw== X-Gm-Message-State: ALoCoQmCfVzZiT/DbIwrBGaK1CFYYAWN3WBu6ZmCqFkkGknEc7f68ewRqquNkHvEO9im8AIdhS40 X-Received: by 10.152.19.161 with SMTP id g1mr9859247lae.8.1434625009285; Thu, 18 Jun 2015 03:56:49 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.204.103 with SMTP id kx7ls449822lac.62.gmail; Thu, 18 Jun 2015 03:56:49 -0700 (PDT) X-Received: by 10.152.121.42 with SMTP id lh10mr12682284lab.0.1434625009106; Thu, 18 Jun 2015 03:56:49 -0700 (PDT) Received: from mail-lb0-f171.google.com (mail-lb0-f171.google.com. [209.85.217.171]) by mx.google.com with ESMTPS id mk8si6169271lbb.129.2015.06.18.03.56.49 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Jun 2015 03:56:49 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.171 as permitted sender) client-ip=209.85.217.171; Received: by lbbti3 with SMTP id ti3so49719511lbb.1 for ; Thu, 18 Jun 2015 03:56:49 -0700 (PDT) X-Received: by 10.152.121.67 with SMTP id li3mr12239473lab.29.1434625008991; Thu, 18 Jun 2015 03:56:48 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.108.230 with SMTP id hn6csp1095013lbb; Thu, 18 Jun 2015 03:56:47 -0700 (PDT) X-Received: by 10.70.20.5 with SMTP id j5mr20267802pde.40.1434625006522; Thu, 18 Jun 2015 03:56:46 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id pn8si10829313pbb.126.2015.06.18.03.56.45; Thu, 18 Jun 2015 03:56:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932448AbbFRK4d (ORCPT + 30 others); Thu, 18 Jun 2015 06:56:33 -0400 Received: from mail-pa0-f49.google.com ([209.85.220.49]:32984 "EHLO mail-pa0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754193AbbFRKzL (ORCPT ); Thu, 18 Jun 2015 06:55:11 -0400 Received: by padev16 with SMTP id ev16so59042563pad.0 for ; Thu, 18 Jun 2015 03:55:11 -0700 (PDT) X-Received: by 10.68.68.167 with SMTP id x7mr19959703pbt.161.1434624911220; Thu, 18 Jun 2015 03:55:11 -0700 (PDT) Received: from localhost ([122.167.70.98]) by mx.google.com with ESMTPSA id kp2sm7721502pab.12.2015.06.18.03.55.10 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 18 Jun 2015 03:55:10 -0700 (PDT) From: Viresh Kumar To: Thomas Gleixner , Daniel Lezcano Cc: linaro-kernel@lists.linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Viresh Kumar , Michal Simek , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= Subject: [PATCH 02/41] clocksource: cadence_ttc: Migrate to new 'set-state' interface Date: Thu, 18 Jun 2015 16:24:16 +0530 Message-Id: X-Mailer: git-send-email 2.4.0 In-Reply-To: References: In-Reply-To: References: MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: viresh.kumar@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.171 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Migrate cadence_ttc driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. Cc: Michal Simek Cc: Sören Brinkmann Signed-off-by: Viresh Kumar --- drivers/clocksource/cadence_ttc_timer.c | 59 ++++++++++++++++++--------------- 1 file changed, 32 insertions(+), 27 deletions(-) diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c index 510c8a1d37b3..e47e0e0887eb 100644 --- a/drivers/clocksource/cadence_ttc_timer.c +++ b/drivers/clocksource/cadence_ttc_timer.c @@ -191,40 +191,42 @@ static int ttc_set_next_event(unsigned long cycles, } /** - * ttc_set_mode - Sets the mode of timer + * ttc_set_{shutdown|oneshot|periodic} - Sets the state of timer * - * @mode: Mode to be set * @evt: Address of clock event instance **/ -static void ttc_set_mode(enum clock_event_mode mode, - struct clock_event_device *evt) +static int ttc_shutdown(struct clock_event_device *evt) { struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt); struct ttc_timer *timer = &ttce->ttc; u32 ctrl_reg; - switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: - ttc_set_interval(timer, DIV_ROUND_CLOSEST(ttce->ttc.freq, - PRESCALE * HZ)); - break; - case CLOCK_EVT_MODE_ONESHOT: - case CLOCK_EVT_MODE_UNUSED: - case CLOCK_EVT_MODE_SHUTDOWN: - ctrl_reg = readl_relaxed(timer->base_addr + - TTC_CNT_CNTRL_OFFSET); - ctrl_reg |= TTC_CNT_CNTRL_DISABLE_MASK; - writel_relaxed(ctrl_reg, - timer->base_addr + TTC_CNT_CNTRL_OFFSET); - break; - case CLOCK_EVT_MODE_RESUME: - ctrl_reg = readl_relaxed(timer->base_addr + - TTC_CNT_CNTRL_OFFSET); - ctrl_reg &= ~TTC_CNT_CNTRL_DISABLE_MASK; - writel_relaxed(ctrl_reg, - timer->base_addr + TTC_CNT_CNTRL_OFFSET); - break; - } + ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET); + ctrl_reg |= TTC_CNT_CNTRL_DISABLE_MASK; + writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); + return 0; +} + +static int ttc_set_periodic(struct clock_event_device *evt) +{ + struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt); + struct ttc_timer *timer = &ttce->ttc; + + ttc_set_interval(timer, + DIV_ROUND_CLOSEST(ttce->ttc.freq, PRESCALE * HZ)); + return 0; +} + +static int ttc_resume(struct clock_event_device *evt) +{ + struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt); + struct ttc_timer *timer = &ttce->ttc; + u32 ctrl_reg; + + ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET); + ctrl_reg &= ~TTC_CNT_CNTRL_DISABLE_MASK; + writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); + return 0; } static int ttc_rate_change_clocksource_cb(struct notifier_block *nb, @@ -430,7 +432,10 @@ static void __init ttc_setup_clockevent(struct clk *clk, ttcce->ce.name = "ttc_clockevent"; ttcce->ce.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; ttcce->ce.set_next_event = ttc_set_next_event; - ttcce->ce.set_mode = ttc_set_mode; + ttcce->ce.set_state_shutdown = ttc_shutdown; + ttcce->ce.set_state_periodic = ttc_set_periodic; + ttcce->ce.set_state_oneshot = ttc_shutdown; + ttcce->ce.tick_resume = ttc_resume; ttcce->ce.rating = 200; ttcce->ce.irq = irq; ttcce->ce.cpumask = cpu_possible_mask;