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[2001:1868:205::9]) by mx.google.com with ESMTPS id dv10si4063910pdb.202.2015.07.08.06.16.55 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 08 Jul 2015 06:16:56 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZCpCS-000887-CR; Wed, 08 Jul 2015 13:15:44 +0000 Received: from mail-wi0-f172.google.com ([209.85.212.172]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZCpCP-0007uD-IZ for linux-arm-kernel@lists.infradead.org; Wed, 08 Jul 2015 13:15:42 +0000 Received: by wifm2 with SMTP id m2so89217783wif.1 for ; Wed, 08 Jul 2015 06:15:18 -0700 (PDT) X-Received: by 10.194.94.101 with SMTP id db5mr19027516wjb.91.1436361318611; Wed, 08 Jul 2015 06:15:18 -0700 (PDT) Received: from localhost.localdomain ([85.235.11.236]) by smtp.gmail.com with ESMTPSA id fq7sm2924295wic.5.2015.07.08.06.15.15 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 08 Jul 2015 06:15:17 -0700 (PDT) From: Linus Walleij To: arm@kernel.org Subject: [PATCH 1/2] ARM: ux500: define serial port aliases Date: Wed, 8 Jul 2015 15:15:07 +0200 Message-Id: <1436361307-27686-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150708_061541_763197_2B0BD3A3 X-CRM114-Status: GOOD ( 14.27 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.212.172 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.212.172 listed in wl.mailspike.net] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Cc: Linus Walleij , Ulf Hansson , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.175 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This enumerates the PL011 serial ports on the Ux500. This is necessary to do if we want to remove one of the serial ports, since userspace depends on console to be present on ttyAMA2 and we must not break userspace. Cc: Ulf Hansson Signed-off-by: Linus Walleij --- ARM SoC guys: if you find this patch OK, please apply this directly for fixes, as a prerequisite for patch 2/2. --- arch/arm/boot/dts/ste-dbx5x0.dtsi | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index 853684ad7773..7db3650e05c4 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -15,6 +15,13 @@ #include "skeleton.dtsi" / { + /* This stablilizes the serial port enumeration */ + aliases { + serial0 = &ux500_serial0; + serial1 = &ux500_serial1; + serial2 = &ux500_serial2; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -971,7 +978,7 @@ power-domains = <&pm_domains DOMAIN_VAPE>; }; - uart@80120000 { + ux500_serial0: uart@80120000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x80120000 0x1000>; interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; @@ -986,7 +993,7 @@ status = "disabled"; }; - uart@80121000 { + ux500_serial1: uart@80121000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x80121000 0x1000>; interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>; @@ -1001,7 +1008,7 @@ status = "disabled"; }; - uart@80007000 { + ux500_serial2: uart@80007000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x80007000 0x1000>; interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;