From patchwork Mon Nov 14 12:38:57 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Guittot X-Patchwork-Id: 5099 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2EB8D23E01 for ; Mon, 14 Nov 2011 12:39:09 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id 1DA5DA180DE for ; Mon, 14 Nov 2011 12:39:09 +0000 (UTC) Received: by mail-fx0-f52.google.com with SMTP id a26so395605faa.11 for ; Mon, 14 Nov 2011 04:39:09 -0800 (PST) Received: by 10.152.162.10 with SMTP id xw10mr13838700lab.12.1321274348812; Mon, 14 Nov 2011 04:39:08 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.40.7 with SMTP id t7cs37785lak; Mon, 14 Nov 2011 04:39:08 -0800 (PST) Received: by 10.227.205.130 with SMTP id fq2mr15637970wbb.17.1321274347213; Mon, 14 Nov 2011 04:39:07 -0800 (PST) Received: from mail-wy0-f178.google.com (mail-wy0-f178.google.com [74.125.82.178]) by mx.google.com with ESMTPS id ge20si4976326wbb.76.2011.11.14.04.39.06 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 14 Nov 2011 04:39:07 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) client-ip=74.125.82.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) smtp.mail=vincent.guittot@linaro.org Received: by mail-wy0-f178.google.com with SMTP id 13so1347236wyh.37 for ; Mon, 14 Nov 2011 04:39:06 -0800 (PST) Received: by 10.216.131.222 with SMTP id m72mr1147829wei.49.1321274346674; Mon, 14 Nov 2011 04:39:06 -0800 (PST) Received: from localhost.localdomain (pas72-1-88-161-60-229.fbx.proxad.net. [88.161.60.229]) by mx.google.com with ESMTPS id fy13sm24714641wbb.18.2011.11.14.04.39.05 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 14 Nov 2011 04:39:05 -0800 (PST) From: Vincent Guittot To: linaro-dev@lists.linaro.org Cc: patches@linaro.org, Vincent Guittot Subject: [RFC PATCH v2 05/09] ARM: cpu topology: Modify cpu_power according to sched_mc level Date: Mon, 14 Nov 2011 13:38:57 +0100 Message-Id: <1321274337-2361-1-git-send-email-vincent.guittot@linaro.org> X-Mailer: git-send-email 1.7.4.1 Signed-off-by: Vincent Guittot --- arch/arm/kernel/topology.c | 43 +++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 41 insertions(+), 2 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 9d80e22..2774c5d 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -61,6 +62,43 @@ static DEFINE_PER_CPU(unsigned int, cpu_scale); unsigned int advanced_topology = 1; +static void normal_cpu_topology_mask(void); +static void (*set_cpu_topology_mask)(void) = normal_cpu_topology_mask; + +/* This table sets the cpu_power scale of a cpu according to the sched_mc mode. + * The content of this table could be SoC specific so we should add a method to + * overwrite this default table. + * TODO: Study how to use DT for setting this table + */ +#define ARM_CORTEX_A9_DEFAULT_SCALE 0 +#define ARM_CORTEX_A9_POWER_SCALE 1 +/* This table list all possible cpu power configuration */ +unsigned int table_config[2] = { + 1024, + 4096 +}; + +static void set_power_scale(unsigned int cpu, unsigned int idx) +{ + per_cpu(cpu_scale, cpu) = table_config[idx]; +} + +static int init_cpu_power_scale(void) +{ + /* Do we need to change default config */ + advanced_topology = 1; + + /* force topology update */ + arch_update_cpu_topology(); + + /* Force a cpu topology update */ + rebuild_sched_domains(); + + return 0; +} + +core_initcall(init_cpu_power_scale); + /* * Update the cpu power */ @@ -129,6 +167,7 @@ static void normal_cpu_topology_mask(void) for_each_possible_cpu(cpuid) { default_cpu_topology_mask(cpuid); + set_power_scale(cpuid, ARM_CORTEX_A9_DEFAULT_SCALE); } smp_wmb(); } @@ -139,7 +178,6 @@ static void normal_cpu_topology_mask(void) */ static void power_cpu_topology_mask_CA9(void) { - unsigned int cpuid, cpu; for_each_possible_cpu(cpuid) { @@ -164,6 +202,7 @@ static void power_cpu_topology_mask_CA9(void) } } } + set_power_scale(cpuid, ARM_CORTEX_A9_POWER_SCALE); } smp_wmb(); } @@ -278,7 +317,7 @@ int arch_update_cpu_topology(void) /* set topology policy */ update_cpu_topology_policy(); - /* set topology mask*/ + /* set topology mask and power */ (*set_cpu_topology_mask)(); return 1;