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[209.132.180.67]) by mx.google.com with ESMTP id rm15si16671558pac.85.2015.07.16.22.11.51; Thu, 16 Jul 2015 22:11:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755098AbbGQFLs (ORCPT + 28 others); Fri, 17 Jul 2015 01:11:48 -0400 Received: from mail-pa0-f46.google.com ([209.85.220.46]:33988 "EHLO mail-pa0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752654AbbGQFLq (ORCPT ); Fri, 17 Jul 2015 01:11:46 -0400 Received: by pacan13 with SMTP id an13so54822351pac.1 for ; Thu, 16 Jul 2015 22:11:45 -0700 (PDT) X-Received: by 10.68.57.168 with SMTP id j8mr25228007pbq.99.1437109905627; Thu, 16 Jul 2015 22:11:45 -0700 (PDT) Received: from localhost ([122.171.186.190]) by smtp.gmail.com with ESMTPSA id qs5sm9684277pbb.37.2015.07.16.22.11.44 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 16 Jul 2015 22:11:44 -0700 (PDT) From: Viresh Kumar To: arm@kernel.org, olof@lixom.net Cc: linaro-kernel@lists.linaro.org, arnd.bergmann@linaro.org, linux-arm-kernel@lists.infradead.org, Viresh Kumar , =?UTF-8?q?Krzysztof=20Ha=C5=82asa?= , linux-kernel@vger.kernel.org (open list), Russell King Subject: [PATCH 02/18] ARM/cns3xxx/timer: Migrate to new 'set-state' interface Date: Fri, 17 Jul 2015 10:40:56 +0530 Message-Id: <9bdc2e0c9a45b2b5f4de9927562305475ecb9b55.1437101996.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.4.0 In-Reply-To: References: In-Reply-To: References: MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: viresh.kumar@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.169 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Migrate cns3xxx driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. NOTE: We don't read TIMER1_2_CONTROL_OFFSET register on shutdown anymore. Acked-by: Krzysztof Hałasa Signed-off-by: Viresh Kumar --- arch/arm/mach-cns3xxx/core.c | 55 +++++++++++++++++++++++++------------------- 1 file changed, 31 insertions(+), 24 deletions(-) diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index 4e9837ded96d..11f9644f8f41 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c @@ -113,30 +113,33 @@ void cns3xxx_power_off(void) */ static void __iomem *cns3xxx_tmr1; -static void cns3xxx_timer_set_mode(enum clock_event_mode mode, - struct clock_event_device *clk) +static int cns3xxx_shutdown(struct clock_event_device *clk) +{ + writel(0, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); + return 0; +} + +static int cns3xxx_set_oneshot(struct clock_event_device *clk) +{ + unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); + + /* period set, and timer enabled in 'next_event' hook */ + ctrl |= (1 << 2) | (1 << 9); + writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); + return 0; +} + +static int cns3xxx_set_periodic(struct clock_event_device *clk) { unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); int pclk = cns3xxx_cpu_clock() / 8; int reload; - switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: - reload = pclk * 20 / (3 * HZ) * 0x25000; - writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET); - ctrl |= (1 << 0) | (1 << 2) | (1 << 9); - break; - case CLOCK_EVT_MODE_ONESHOT: - /* period set, and timer enabled in 'next_event' hook */ - ctrl |= (1 << 2) | (1 << 9); - break; - case CLOCK_EVT_MODE_UNUSED: - case CLOCK_EVT_MODE_SHUTDOWN: - default: - ctrl = 0; - } - + reload = pclk * 20 / (3 * HZ) * 0x25000; + writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET); + ctrl |= (1 << 0) | (1 << 2) | (1 << 9); writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); + return 0; } static int cns3xxx_timer_set_next_event(unsigned long evt, @@ -151,12 +154,16 @@ static int cns3xxx_timer_set_next_event(unsigned long evt, } static struct clock_event_device cns3xxx_tmr1_clockevent = { - .name = "cns3xxx timer1", - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, - .set_mode = cns3xxx_timer_set_mode, - .set_next_event = cns3xxx_timer_set_next_event, - .rating = 350, - .cpumask = cpu_all_mask, + .name = "cns3xxx timer1", + .features = CLOCK_EVT_FEAT_PERIODIC | + CLOCK_EVT_FEAT_ONESHOT, + .set_state_shutdown = cns3xxx_shutdown, + .set_state_periodic = cns3xxx_set_periodic, + .set_state_oneshot = cns3xxx_set_oneshot, + .tick_resume = cns3xxx_shutdown, + .set_next_event = cns3xxx_timer_set_next_event, + .rating = 350, + .cpumask = cpu_all_mask, }; static void __init cns3xxx_clockevents_init(unsigned int timer_irq)