| Message ID | 1438149721-11072-1-git-send-email-leo.yan@linaro.org |
|---|---|
| State | New |
| Headers | show |
On Wed, Jul 29, 2015 at 8:02 AM, Leo Yan <leo.yan@linaro.org> wrote: > When use rtc-pl031 for suspend test on Hisilicon's SoC Hi6220, Usually > the data register (DR) will read back as value zero. So the suspend > test code will set the match register (MR) for 10 seconds' timeout; But > there have chance later will read back some random values from DR > register; So finally miss with match value and will not trigger > waken up event anymore. > > This issue can be dismissed by reset registers in initialization flow; > And this code have no harm for ST's variant. > > Signed-off-by: Leo Yan <leo.yan@linaro.org> I don't understand this... > + /* Init registers */ > + writel(0x0, ldata->base + RTC_LR); This will reset the clock to jan 1st 1970 on every reboot. The idea is that the RTC should *preserve* the system time if you reboot the system, so NACK. Usually userspace has a script using hwclock to read the system time from the rtc to system time with hwclock -s after userspace comes up. Likewise it writes it back with hwclock -w before rebooting. > + writel(0x0, ldata->base + RTC_DR); This is a read-only register in the PL031 clean variant. What do you want to achieve here? Is this register writeable on the HiSilicon? > + writel(0x0, ldata->base + RTC_IMSC); OK > + writel(RTC_BIT_AI, ldata->base + RTC_ICR); So why do we want to have the alarm enabled by default, before the kernel nor userspace has requested it? If your problem is with suspend/resume I suggest you work on the [runtime]_suspend/resume hooks instead of probe(). Possibly you need to save/restore state across suspend/resume. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c index 99181fff..01768de 100644 --- a/drivers/rtc/rtc-pl031.c +++ b/drivers/rtc/rtc-pl031.c @@ -345,6 +345,12 @@ static int pl031_probe(struct amba_device *adev, const struct amba_id *id) dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev)); dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev)); + /* Init registers */ + writel(0x0, ldata->base + RTC_LR); + writel(0x0, ldata->base + RTC_DR); + writel(0x0, ldata->base + RTC_IMSC); + writel(RTC_BIT_AI, ldata->base + RTC_ICR); + data = readl(ldata->base + RTC_CR); /* Enable the clockwatch on ST Variants */ if (vendor->clockwatch)
When use rtc-pl031 for suspend test on Hisilicon's SoC Hi6220, Usually the data register (DR) will read back as value zero. So the suspend test code will set the match register (MR) for 10 seconds' timeout; But there have chance later will read back some random values from DR register; So finally miss with match value and will not trigger waken up event anymore. This issue can be dismissed by reset registers in initialization flow; And this code have no harm for ST's variant. Signed-off-by: Leo Yan <leo.yan@linaro.org> --- drivers/rtc/rtc-pl031.c | 6 ++++++ 1 file changed, 6 insertions(+)