| Message ID | 20211124073419.181799-6-marcan@marcan.st |
|---|---|
| State | New |
| Headers | show |
| Series | Apple SoC PMGR device power states driver | expand |
diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml index cf6c091a07b1..97359024709a 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml @@ -65,6 +65,9 @@ properties: Specifies base physical address and size of the AIC registers. maxItems: 1 + power-domains: + maxItems: 1 + required: - compatible - '#interrupt-cells'
This will bind to the PMGR pwrstate nodes that control power/clock gating to SoC blocks. The AIC driver doesn't do runtime-pm and likely never will (since it is system-critical), but it makes sense to describe the power domain relationship the devicetree properly. Signed-off-by: Hector Martin <marcan@marcan.st> --- .../devicetree/bindings/interrupt-controller/apple,aic.yaml | 3 +++ 1 file changed, 3 insertions(+)