From patchwork Tue Nov 22 09:35:32 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Daniel Kachhap X-Patchwork-Id: 5273 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id EE32E23E10 for ; Tue, 22 Nov 2011 09:38:47 +0000 (UTC) Received: from mail-yw0-f52.google.com (mail-yw0-f52.google.com [209.85.213.52]) by fiordland.canonical.com (Postfix) with ESMTP id B7546A186DB for ; Tue, 22 Nov 2011 09:38:47 +0000 (UTC) Received: by ywb5 with SMTP id 5so7913917ywb.11 for ; Tue, 22 Nov 2011 01:38:47 -0800 (PST) Received: by 10.152.144.136 with SMTP id sm8mr11334242lab.33.1321954726828; Tue, 22 Nov 2011 01:38:46 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.41.198 with SMTP id h6cs169523lal; Tue, 22 Nov 2011 01:38:46 -0800 (PST) Received: by 10.236.181.164 with SMTP id l24mr25891619yhm.22.1321954724805; Tue, 22 Nov 2011 01:38:44 -0800 (PST) Received: from mail-gx0-f178.google.com (mail-gx0-f178.google.com [209.85.161.178]) by mx.google.com with ESMTPS id x21si3680105ybx.109.2011.11.22.01.38.44 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 22 Nov 2011 01:38:44 -0800 (PST) Received-SPF: pass (google.com: domain of amitdanielk@gmail.com designates 209.85.161.178 as permitted sender) client-ip=209.85.161.178; Authentication-Results: mx.google.com; spf=pass (google.com: domain of amitdanielk@gmail.com designates 209.85.161.178 as permitted sender) smtp.mail=amitdanielk@gmail.com; dkim=pass (test mode) header.i=@gmail.com Received: by mail-gx0-f178.google.com with SMTP id k4so6621707ggn.37 for ; Tue, 22 Nov 2011 01:38:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=ZXqFb+D8V8iemiFF0mcmJUypDvLPRDz4SPinSGv6uY8=; b=giqtV03N8gGATsat3OkW055mViN051S5ybv0S/XcvyREFgpR3FxB4nZmBubTv7ySPg 8Z572ZiXrwb8dxzd/fXF6lzMWj2idTNuOPGoR0RyUtuGw3+PALOi8IqDIvZJvTa7SzWi 97vMsqgQ3DzjL/qFqhv6NyzfMiJuiY38ZxX0w= Received: by 10.50.135.40 with SMTP id pp8mr19392557igb.1.1321954724045; Tue, 22 Nov 2011 01:38:44 -0800 (PST) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id el2sm10208537ibb.10.2011.11.22.01.38.24 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 22 Nov 2011 01:38:43 -0800 (PST) Sender: amit kachhap From: Amit Daniel Kachhap To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, kgene.kim@samsung.com, amit.kachhap@linaro.org, patches@linaro.org Subject: [PATCH V3 6/6] ARM: exynos: Enable l2 configuration through device tree Date: Tue, 22 Nov 2011 15:05:32 +0530 Message-Id: <1321954532-18724-7-git-send-email-amit.kachhap@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1321954532-18724-1-git-send-email-amit.kachhap@linaro.org> References: <1321954532-18724-1-git-send-email-amit.kachhap@linaro.org> This patch enables calling generic l2 setup functions if device tree is used. Signed-off-by: Amit Daniel Kachhap --- arch/arm/mach-exynos/cpu.c | 12 ++++++++++-- 1 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c index 252e346..b62a90f 100644 --- a/arch/arm/mach-exynos/cpu.c +++ b/arch/arm/mach-exynos/cpu.c @@ -37,6 +37,9 @@ #include #include +#define L2_AUX_VAL 0x7C470001 +#define L2_AUX_MASK 0xC200ffff + unsigned int gic_bank_offset __read_mostly; extern int combiner_init(unsigned int combiner_nr, void __iomem *base, @@ -299,6 +302,7 @@ core_initcall(exynos4_core_init); #ifdef CONFIG_CACHE_L2X0 static int __init exynos4_l2x0_cache_init(void) { +#ifndef CONFIG_OF if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) { l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC; /* TAG, Data Latency Control: 2 cycles */ @@ -332,8 +336,12 @@ static int __init exynos4_l2x0_cache_init(void) clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs)); } - l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff); - + l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK); +#else + l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); + l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); + clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); +#endif return 0; }