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[209.132.180.67]) by mx.google.com with ESMTP id vr1si32360370pab.21.2015.09.02.07.25.32; Wed, 02 Sep 2015 07:25:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754953AbbIBOZD (ORCPT + 28 others); Wed, 2 Sep 2015 10:25:03 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:52268 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754926AbbIBOY7 (ORCPT ); Wed, 2 Sep 2015 10:24:59 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id t82EOqZG002906; Wed, 2 Sep 2015 09:24:52 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t82EOqxe009354; Wed, 2 Sep 2015 09:24:52 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.224.2; Wed, 2 Sep 2015 09:24:52 -0500 Received: from rockdesk.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t82EOPFV024150; Wed, 2 Sep 2015 09:24:50 -0500 From: Roger Quadros To: CC: , , , , , , , , Roger Quadros Subject: [PATCH v4 8/9] usb: dwc3: core: Prevent otg events from disabling themselves Date: Wed, 2 Sep 2015 17:24:23 +0300 Message-ID: <1441203864-15786-9-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1441203864-15786-1-git-send-email-rogerq@ti.com> References: <1441203864-15786-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.44 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , There is a race happening during dwc3_drd_init() that causes otg events to get disabled. This is what happens. dwc3_otg_irq() happens immediately when PRTCAP is set to OTG, even though OEVTEN is 0. This is because BIT 31 IRQ of OEVT can't be disabled by OEVTEN. We configure OEVTEN in dwc3_otg_init() but dwc3_otg_irq() has already saved OEVTEN as 0 into dwc->oevten. So finally when dwc3_irq_thread_irq() is called we save 0 into OEVTEN thus disabling OTG irqs forever. We fix this by disabling IRQs when configuring OEVTEN in dwc3_otg_init(). Signed-off-by: Roger Quadros --- drivers/usb/dwc3/core.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 684010c..654aebf 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -921,6 +921,7 @@ static int dwc3_drd_init(struct dwc3 *dwc) int ret, id, vbus; struct usb_otg_caps *otgcaps = &dwc->otg_config.otg_caps; u32 reg; + unsigned long flags; otgcaps->otg_rev = 0; otgcaps->hnp_support = false; @@ -993,6 +994,8 @@ try_otg_core: goto error; } + spin_lock_irqsave(&dwc->lock, flags); + /* we need to set OTG to get events from OTG core */ dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG); /* GUSB2PHYCFG0.SusPHY=0 */ @@ -1018,6 +1021,8 @@ try_otg_core: /* OCTL.PeriMode = 1 */ dwc3_writel(dwc->regs, DWC3_OCTL, DWC3_OCTL_PERIMODE); + spin_unlock_irqrestore(&dwc->lock, flags); + dwc3_otg_fsm_sync(dwc); usb_otg_sync_inputs(dwc->fsm);