[v2] S5PC2XX: Rename S5pc2XX to exynos4

Message ID 1322198052-17317-1-git-send-email-chander.kashyap@linaro.org
State Superseded
Headers show

Commit Message

Chander Kashyap Nov. 25, 2011, 5:14 a.m.
As per new conventions Samsung SoC's are named as Exynos.
Cortex-A9 based Soc's are named as exynos4. s5pc2xx is cortex-A9
based, hence renamed to exynos4. This is done as per kernel
naming convetions.

Similerly s5pc210 is now exynos4210. Hence S5PC210/s5pc210
suffix/prefix has been renamed to exynos4210/EXYNOS4210

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
---
Changes for v2:
	- Removed renaming of s5p-common to exynos4-common
	- Renamed s5pc210 prefixes to exynos4210

Rebased on following commit.
19cdfd3e84bff108febb127b598ac3f1634c768c
"Ethernut 5 board support"

 MAINTAINERS                                        |    6 +-
 Makefile                                           |    2 +-
 arch/arm/cpu/armv7/{s5pc2xx => exynos4}/Makefile   |    0
 arch/arm/cpu/armv7/{s5pc2xx => exynos4}/clock.c    |   50 ++++++++--------
 arch/arm/cpu/armv7/{s5pc2xx => exynos4}/soc.c      |    0
 .../asm/{arch-s5pc2xx => arch-exynos4}/adc.h       |    0
 .../asm/{arch-s5pc2xx => arch-exynos4}/clk.h       |    0
 .../asm/{arch-s5pc2xx => arch-exynos4}/clock.h     |    2 +-
 .../asm/{arch-s5pc2xx => arch-exynos4}/cpu.h       |   62 ++++++++++----------
 .../asm/{arch-s5pc2xx => arch-exynos4}/gpio.h      |   28 +++++-----
 .../asm/{arch-s5pc2xx => arch-exynos4}/mmc.h       |    0
 .../asm/{arch-s5pc2xx => arch-exynos4}/pwm.h       |    0
 .../asm/{arch-s5pc2xx => arch-exynos4}/sromc.h     |    0
 .../asm/{arch-s5pc2xx => arch-exynos4}/sys_proto.h |    0
 .../asm/{arch-s5pc2xx => arch-exynos4}/uart.h      |    0
 board/samsung/origen/lowlevel_init.S               |   26 ++++----
 board/samsung/origen/mem_setup.S                   |   12 ++--
 board/samsung/origen/origen.c                      |    8 +-
 board/samsung/origen/origen_setup.h                |    8 +-
 board/samsung/smdkv310/lowlevel_init.S             |   22 ++++----
 board/samsung/smdkv310/mem_setup.S                 |    8 +-
 board/samsung/smdkv310/smdkv310.c                  |    8 +-
 board/samsung/universal_c210/lowlevel_init.S       |   24 ++++----
 board/samsung/universal_c210/universal.c           |    8 +-
 boards.cfg                                         |    6 +-
 include/configs/origen.h                           |    6 +-
 include/configs/s5pc210_universal.h                |   10 ++--
 include/configs/smdkv310.h                         |    6 +-
 28 files changed, 151 insertions(+), 151 deletions(-)
 rename arch/arm/cpu/armv7/{s5pc2xx => exynos4}/Makefile (100%)
 rename arch/arm/cpu/armv7/{s5pc2xx => exynos4}/clock.c (80%)
 rename arch/arm/cpu/armv7/{s5pc2xx => exynos4}/soc.c (100%)
 rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/adc.h (100%)
 rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/clk.h (100%)
 rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/clock.h (99%)
 rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/cpu.h (64%)
 rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/gpio.h (83%)
 rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/mmc.h (100%)
 rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/pwm.h (100%)
 rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/sromc.h (100%)
 rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/sys_proto.h (100%)
 rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/uart.h (100%)

Comments

Kyungmin Park Nov. 25, 2011, 8:51 a.m. | #1
Hi,

New Cortex-A15 also uses the armv7. So it's better to use the exynos itself.
Just remove the number 4.

Thank you,
Kyungmin Park

On 11/25/11, Chander Kashyap <chander.kashyap@linaro.org> wrote:
> As per new conventions Samsung SoC's are named as Exynos.
> Cortex-A9 based Soc's are named as exynos4. s5pc2xx is cortex-A9
> based, hence renamed to exynos4. This is done as per kernel
> naming convetions.
>
> Similerly s5pc210 is now exynos4210. Hence S5PC210/s5pc210
> suffix/prefix has been renamed to exynos4210/EXYNOS4210
>
> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
> ---
> Changes for v2:
> 	- Removed renaming of s5p-common to exynos4-common
> 	- Renamed s5pc210 prefixes to exynos4210
>
> Rebased on following commit.
> 19cdfd3e84bff108febb127b598ac3f1634c768c
> "Ethernut 5 board support"
>
>  MAINTAINERS                                        |    6 +-
>  Makefile                                           |    2 +-
>  arch/arm/cpu/armv7/{s5pc2xx => exynos4}/Makefile   |    0
>  arch/arm/cpu/armv7/{s5pc2xx => exynos4}/clock.c    |   50 ++++++++--------
>  arch/arm/cpu/armv7/{s5pc2xx => exynos4}/soc.c      |    0
>  .../asm/{arch-s5pc2xx => arch-exynos4}/adc.h       |    0
>  .../asm/{arch-s5pc2xx => arch-exynos4}/clk.h       |    0
>  .../asm/{arch-s5pc2xx => arch-exynos4}/clock.h     |    2 +-
>  .../asm/{arch-s5pc2xx => arch-exynos4}/cpu.h       |   62
> ++++++++++----------
>  .../asm/{arch-s5pc2xx => arch-exynos4}/gpio.h      |   28 +++++-----
>  .../asm/{arch-s5pc2xx => arch-exynos4}/mmc.h       |    0
>  .../asm/{arch-s5pc2xx => arch-exynos4}/pwm.h       |    0
>  .../asm/{arch-s5pc2xx => arch-exynos4}/sromc.h     |    0
>  .../asm/{arch-s5pc2xx => arch-exynos4}/sys_proto.h |    0
>  .../asm/{arch-s5pc2xx => arch-exynos4}/uart.h      |    0
>  board/samsung/origen/lowlevel_init.S               |   26 ++++----
>  board/samsung/origen/mem_setup.S                   |   12 ++--
>  board/samsung/origen/origen.c                      |    8 +-
>  board/samsung/origen/origen_setup.h                |    8 +-
>  board/samsung/smdkv310/lowlevel_init.S             |   22 ++++----
>  board/samsung/smdkv310/mem_setup.S                 |    8 +-
>  board/samsung/smdkv310/smdkv310.c                  |    8 +-
>  board/samsung/universal_c210/lowlevel_init.S       |   24 ++++----
>  board/samsung/universal_c210/universal.c           |    8 +-
>  boards.cfg                                         |    6 +-
>  include/configs/origen.h                           |    6 +-
>  include/configs/s5pc210_universal.h                |   10 ++--
>  include/configs/smdkv310.h                         |    6 +-
>  28 files changed, 151 insertions(+), 151 deletions(-)
>  rename arch/arm/cpu/armv7/{s5pc2xx => exynos4}/Makefile (100%)
>  rename arch/arm/cpu/armv7/{s5pc2xx => exynos4}/clock.c (80%)
>  rename arch/arm/cpu/armv7/{s5pc2xx => exynos4}/soc.c (100%)
>  rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/adc.h (100%)
>  rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/clk.h (100%)
>  rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/clock.h (99%)
>  rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/cpu.h (64%)
>  rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/gpio.h (83%)
>  rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/mmc.h (100%)
>  rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/pwm.h (100%)
>  rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/sromc.h (100%)
>  rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/sys_proto.h
> (100%)
>  rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/uart.h (100%)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 37bbb34..d493e4e 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -691,12 +691,12 @@ Minkyu Kang <mk7.kang@samsung.com>
>
>  	SMDKC100		ARM ARMV7 (S5PC100 SoC)
>  	s5p_goni		ARM ARMV7 (S5PC110 SoC)
> -	s5pc210_universal	ARM ARMV7 (S5PC210 SoC)
> +	s5pc210_universal	ARM ARMV7 (EXYNOS4210 SoC)
>
>  Chander Kashyap <k.chander@samsung.com>
>
> -	origen			ARM ARMV7 (S5PC210 SoC)
> -	SMDKV310		ARM ARMV7 (S5PC210 SoC)
> +	origen			ARM ARMV7 (EXYNOS4210 SoC)
> +	SMDKV310		ARM ARMV7 (EXYNOS4210 SoC)
>
>  Torsten Koschorrek <koschorrek@synertronixx.de>
>  	scb9328		ARM920T (i.MXL)
> diff --git a/Makefile b/Makefile
> index fb658f4..646b105 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -296,7 +296,7 @@ endif
>  ifeq ($(SOC),s5pc1xx)
>  LIBS += $(CPUDIR)/s5p-common/libs5p-common.o
>  endif
> -ifeq ($(SOC),s5pc2xx)
> +ifeq ($(SOC),exynos4)
>  LIBS += $(CPUDIR)/s5p-common/libs5p-common.o
>  endif
>
> diff --git a/arch/arm/cpu/armv7/s5pc2xx/Makefile
> b/arch/arm/cpu/armv7/exynos4/Makefile
> similarity index 100%
> rename from arch/arm/cpu/armv7/s5pc2xx/Makefile
> rename to arch/arm/cpu/armv7/exynos4/Makefile
> diff --git a/arch/arm/cpu/armv7/s5pc2xx/clock.c
> b/arch/arm/cpu/armv7/exynos4/clock.c
> similarity index 80%
> rename from arch/arm/cpu/armv7/s5pc2xx/clock.c
> rename to arch/arm/cpu/armv7/exynos4/clock.c
> index 5ecd475..668166a 100644
> --- a/arch/arm/cpu/armv7/s5pc2xx/clock.c
> +++ b/arch/arm/cpu/armv7/exynos4/clock.c
> @@ -30,11 +30,11 @@
>  #define CONFIG_SYS_CLK_FREQ_C210	24000000
>  #endif
>
> -/* s5pc210: return pll clock frequency */
> -static unsigned long s5pc210_get_pll_clk(int pllreg)
> +/* exynos4210: return pll clock frequency */
> +static unsigned long exynos4210_get_pll_clk(int pllreg)
>  {
> -	struct s5pc210_clock *clk =
> -		(struct s5pc210_clock *)samsung_get_base_clock();
> +	struct exynos4210_clock *clk =
> +		(struct exynos4210_clock *)samsung_get_base_clock();
>  	unsigned long r, m, p, s, k = 0, mask, fout;
>  	unsigned int freq;
>
> @@ -96,11 +96,11 @@ static unsigned long s5pc210_get_pll_clk(int pllreg)
>  	return fout;
>  }
>
> -/* s5pc210: return ARM clock frequency */
> -static unsigned long s5pc210_get_arm_clk(void)
> +/* exynos4210: return ARM clock frequency */
> +static unsigned long exynos4210_get_arm_clk(void)
>  {
> -	struct s5pc210_clock *clk =
> -		(struct s5pc210_clock *)samsung_get_base_clock();
> +	struct exynos4210_clock *clk =
> +		(struct exynos4210_clock *)samsung_get_base_clock();
>  	unsigned long div;
>  	unsigned long dout_apll;
>  	unsigned int apll_ratio;
> @@ -115,11 +115,11 @@ static unsigned long s5pc210_get_arm_clk(void)
>  	return dout_apll;
>  }
>
> -/* s5pc210: return pwm clock frequency */
> -static unsigned long s5pc210_get_pwm_clk(void)
> +/* exynos4210: return pwm clock frequency */
> +static unsigned long exynos4210_get_pwm_clk(void)
>  {
> -	struct s5pc210_clock *clk =
> -		(struct s5pc210_clock *)samsung_get_base_clock();
> +	struct exynos4210_clock *clk =
> +		(struct exynos4210_clock *)samsung_get_base_clock();
>  	unsigned long pclk, sclk;
>  	unsigned int sel;
>  	unsigned int ratio;
> @@ -158,11 +158,11 @@ static unsigned long s5pc210_get_pwm_clk(void)
>  	return pclk;
>  }
>
> -/* s5pc210: return uart clock frequency */
> -static unsigned long s5pc210_get_uart_clk(int dev_index)
> +/* exynos4210: return uart clock frequency */
> +static unsigned long exynos4210_get_uart_clk(int dev_index)
>  {
> -	struct s5pc210_clock *clk =
> -		(struct s5pc210_clock *)samsung_get_base_clock();
> +	struct exynos4210_clock *clk =
> +		(struct exynos4210_clock *)samsung_get_base_clock();
>  	unsigned long uclk, sclk;
>  	unsigned int sel;
>  	unsigned int ratio;
> @@ -205,11 +205,11 @@ static unsigned long s5pc210_get_uart_clk(int
> dev_index)
>  	return uclk;
>  }
>
> -/* s5pc210: set the mmc clock */
> -static void s5pc210_set_mmc_clk(int dev_index, unsigned int div)
> +/* exynos4210: set the mmc clock */
> +static void exynos4210_set_mmc_clk(int dev_index, unsigned int div)
>  {
> -	struct s5pc210_clock *clk =
> -		(struct s5pc210_clock *)samsung_get_base_clock();
> +	struct exynos4210_clock *clk =
> +		(struct exynos4210_clock *)samsung_get_base_clock();
>  	unsigned int addr;
>  	unsigned int val;
>
> @@ -234,25 +234,25 @@ static void s5pc210_set_mmc_clk(int dev_index,
> unsigned int div)
>
>  unsigned long get_pll_clk(int pllreg)
>  {
> -	return s5pc210_get_pll_clk(pllreg);
> +	return exynos4210_get_pll_clk(pllreg);
>  }
>
>  unsigned long get_arm_clk(void)
>  {
> -	return s5pc210_get_arm_clk();
> +	return exynos4210_get_arm_clk();
>  }
>
>  unsigned long get_pwm_clk(void)
>  {
> -	return s5pc210_get_pwm_clk();
> +	return exynos4210_get_pwm_clk();
>  }
>
>  unsigned long get_uart_clk(int dev_index)
>  {
> -	return s5pc210_get_uart_clk(dev_index);
> +	return exynos4210_get_uart_clk(dev_index);
>  }
>
>  void set_mmc_clk(int dev_index, unsigned int div)
>  {
> -	s5pc210_set_mmc_clk(dev_index, div);
> +	exynos4210_set_mmc_clk(dev_index, div);
>  }
> diff --git a/arch/arm/cpu/armv7/s5pc2xx/soc.c
> b/arch/arm/cpu/armv7/exynos4/soc.c
> similarity index 100%
> rename from arch/arm/cpu/armv7/s5pc2xx/soc.c
> rename to arch/arm/cpu/armv7/exynos4/soc.c
> diff --git a/arch/arm/include/asm/arch-s5pc2xx/adc.h
> b/arch/arm/include/asm/arch-exynos4/adc.h
> similarity index 100%
> rename from arch/arm/include/asm/arch-s5pc2xx/adc.h
> rename to arch/arm/include/asm/arch-exynos4/adc.h
> diff --git a/arch/arm/include/asm/arch-s5pc2xx/clk.h
> b/arch/arm/include/asm/arch-exynos4/clk.h
> similarity index 100%
> rename from arch/arm/include/asm/arch-s5pc2xx/clk.h
> rename to arch/arm/include/asm/arch-exynos4/clk.h
> diff --git a/arch/arm/include/asm/arch-s5pc2xx/clock.h
> b/arch/arm/include/asm/arch-exynos4/clock.h
> similarity index 99%
> rename from arch/arm/include/asm/arch-s5pc2xx/clock.h
> rename to arch/arm/include/asm/arch-exynos4/clock.h
> index 0ff8cf8..b4190a5 100644
> --- a/arch/arm/include/asm/arch-s5pc2xx/clock.h
> +++ b/arch/arm/include/asm/arch-exynos4/clock.h
> @@ -23,7 +23,7 @@
>  #define __ASM_ARM_ARCH_CLOCK_H_
>
>  #ifndef __ASSEMBLY__
> -struct s5pc210_clock {
> +struct exynos4210_clock {
>  	unsigned char	res1[0x4200];
>  	unsigned int	src_leftbus;
>  	unsigned char	res2[0x1fc];
> diff --git a/arch/arm/include/asm/arch-s5pc2xx/cpu.h
> b/arch/arm/include/asm/arch-exynos4/cpu.h
> similarity index 64%
> rename from arch/arm/include/asm/arch-s5pc2xx/cpu.h
> rename to arch/arm/include/asm/arch-exynos4/cpu.h
> index f9015c7..905f38c 100644
> --- a/arch/arm/include/asm/arch-s5pc2xx/cpu.h
> +++ b/arch/arm/include/asm/arch-exynos4/cpu.h
> @@ -19,33 +19,33 @@
>   *
>   */
>
> -#ifndef _S5PC2XX_CPU_H
> -#define _S5PC2XX_CPU_H
> +#ifndef _EXYNOS4_CPU_H
> +#define _EXYNOS4_CPU_H
>
>  #define S5PC2XX_ADDR_BASE	0x10000000
>
> -/* S5PC210 */
> -#define S5PC210_GPIO_PART3_BASE	0x03860000
> -#define S5PC210_PRO_ID		0x10000000
> -#define S5PC210_POWER_BASE	0x10020000
> -#define S5PC210_SWRESET		0x10020400
> -#define S5PC210_CLOCK_BASE	0x10030000
> -#define S5PC210_SYSTIMER_BASE	0x10050000
> -#define S5PC210_WATCHDOG_BASE	0x10060000
> -#define S5PC210_MIU_BASE	0x10600000
> -#define S5PC210_DMC0_BASE	0x10400000
> -#define S5PC210_DMC1_BASE	0x10410000
> -#define S5PC210_GPIO_PART2_BASE	0x11000000
> -#define S5PC210_GPIO_PART1_BASE	0x11400000
> -#define S5PC210_FIMD_BASE	0x11C00000
> -#define S5PC210_USBOTG_BASE	0x12480000
> -#define S5PC210_MMC_BASE	0x12510000
> -#define S5PC210_SROMC_BASE	0x12570000
> -#define S5PC210_USBPHY_BASE	0x125B0000
> -#define S5PC210_UART_BASE	0x13800000
> -#define S5PC210_ADC_BASE	0x13910000
> -#define S5PC210_PWMTIMER_BASE	0x139D0000
> -#define S5PC210_MODEM_BASE	0x13A00000
> +/* EXYNOS4210 */
> +#define EXYNOS4210_GPIO_PART3_BASE	0x03860000
> +#define EXYNOS4210_PRO_ID		0x10000000
> +#define EXYNOS4210_POWER_BASE		0x10020000
> +#define EXYNOS4210_SWRESET		0x10020400
> +#define EXYNOS4210_CLOCK_BASE		0x10030000
> +#define EXYNOS4210_SYSTIMER_BASE	0x10050000
> +#define EXYNOS4210_WATCHDOG_BASE	0x10060000
> +#define EXYNOS4210_MIU_BASE		0x10600000
> +#define EXYNOS4210_DMC0_BASE		0x10400000
> +#define EXYNOS4210_DMC1_BASE		0x10410000
> +#define EXYNOS4210_GPIO_PART2_BASE	0x11000000
> +#define EXYNOS4210_GPIO_PART1_BASE	0x11400000
> +#define EXYNOS4210_FIMD_BASE		0x11C00000
> +#define EXYNOS4210_USBOTG_BASE		0x12480000
> +#define EXYNOS4210_MMC_BASE		0x12510000
> +#define EXYNOS4210_SROMC_BASE		0x12570000
> +#define EXYNOS4210_USBPHY_BASE		0x125B0000
> +#define EXYNOS4210_UART_BASE		0x13800000
> +#define EXYNOS4210_ADC_BASE		0x13910000
> +#define EXYNOS4210_PWMTIMER_BASE	0x139D0000
> +#define EXYNOS4210_MODEM_BASE		0x13A00000
>
>  #ifndef __ASSEMBLY__
>  #include <asm/io.h>
> @@ -60,12 +60,12 @@ static inline int s5p_get_cpu_rev(void)
>
>  static inline void s5p_set_cpu_id(void)
>  {
> -	s5p_cpu_id = readl(S5PC210_PRO_ID);
> +	s5p_cpu_id = readl(EXYNOS4210_PRO_ID);
>  	s5p_cpu_id = (0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12));
>
>  	/*
> -	 * 0xC200: S5PC210 EVT0
> -	 * 0xC210: S5PC210 EVT1
> +	 * 0xC200: EXYNOS4210 EVT0
> +	 * 0xC210: EXYNOS4210 EVT1
>  	 */
>  	if (s5p_cpu_id == 0xC200) {
>  		s5p_cpu_id |= 0x10;
> @@ -81,13 +81,13 @@ static inline int cpu_is_##type(void)			\
>  	return s5p_cpu_id == id ? 1 : 0;		\
>  }
>
> -IS_SAMSUNG_TYPE(s5pc210, 0xc210)
> +IS_SAMSUNG_TYPE(exynos4210, 0xc210)
>
>  #define SAMSUNG_BASE(device, base)				\
>  static inline unsigned int samsung_get_base_##device(void)	\
>  {								\
> -	if (cpu_is_s5pc210())					\
> -		return S5PC210_##base;				\
> +	if (cpu_is_exynos4210())					\
> +		return EXYNOS4210_##base;				\
>  	else							\
>  		return 0;					\
>  }
> @@ -110,4 +110,4 @@ SAMSUNG_BASE(usb_otg, USBOTG_BASE)
>  SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
>  #endif
>
> -#endif	/* _S5PC2XX_CPU_H */
> +#endif	/* _EXYNOS4_CPU_H */
> diff --git a/arch/arm/include/asm/arch-s5pc2xx/gpio.h
> b/arch/arm/include/asm/arch-exynos4/gpio.h
> similarity index 83%
> rename from arch/arm/include/asm/arch-s5pc2xx/gpio.h
> rename to arch/arm/include/asm/arch-exynos4/gpio.h
> index 8be620c..a222cd7 100644
> --- a/arch/arm/include/asm/arch-s5pc2xx/gpio.h
> +++ b/arch/arm/include/asm/arch-exynos4/gpio.h
> @@ -32,7 +32,7 @@ struct s5p_gpio_bank {
>  	unsigned char	res1[8];
>  };
>
> -struct s5pc210_gpio_part1 {
> +struct exynos4210_gpio_part1 {
>  	struct s5p_gpio_bank a0;
>  	struct s5p_gpio_bank a1;
>  	struct s5p_gpio_bank b;
> @@ -51,7 +51,7 @@ struct s5pc210_gpio_part1 {
>  	struct s5p_gpio_bank f3;
>  };
>
> -struct s5pc210_gpio_part2 {
> +struct exynos4210_gpio_part2 {
>  	struct s5p_gpio_bank j0;
>  	struct s5p_gpio_bank j1;
>  	struct s5p_gpio_bank k0;
> @@ -75,7 +75,7 @@ struct s5pc210_gpio_part2 {
>  	struct s5p_gpio_bank x3;
>  };
>
> -struct s5pc210_gpio_part3 {
> +struct exynos4210_gpio_part3 {
>  	struct s5p_gpio_bank z;
>  };
>
> @@ -92,27 +92,27 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int
> gpio, int mode);
>  /* GPIO pins per bank  */
>  #define GPIO_PER_BANK 8
>
> -#define s5pc210_gpio_part1_get_nr(bank, pin) \
> -	((((((unsigned int) &(((struct s5pc210_gpio_part1 *) \
> -			       S5PC210_GPIO_PART1_BASE)->bank)) \
> -	    - S5PC210_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \
> +#define exynos4210_gpio_part1_get_nr(bank, pin) \
> +	((((((unsigned int) &(((struct exynos4210_gpio_part1 *) \
> +			       EXYNOS4210_GPIO_PART1_BASE)->bank)) \
> +	    - EXYNOS4210_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \
>  	  * GPIO_PER_BANK) + pin)
>
> -#define GPIO_PART1_MAX ((sizeof(struct s5pc210_gpio_part1) \
> +#define GPIO_PART1_MAX ((sizeof(struct exynos4210_gpio_part1) \
>  			    / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
>
> -#define s5pc210_gpio_part2_get_nr(bank, pin) \
> -	(((((((unsigned int) &(((struct s5pc210_gpio_part2 *) \
> -				S5PC210_GPIO_PART2_BASE)->bank)) \
> -	    - S5PC210_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
> +#define exynos4210_gpio_part2_get_nr(bank, pin) \
> +	(((((((unsigned int) &(((struct exynos4210_gpio_part2 *) \
> +				EXYNOS4210_GPIO_PART2_BASE)->bank)) \
> +	    - EXYNOS4210_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
>  	  * GPIO_PER_BANK) + pin) + GPIO_PART1_MAX)
>
>  static inline unsigned int s5p_gpio_base(int nr)
>  {
>  	if (nr < GPIO_PART1_MAX)
> -		return S5PC210_GPIO_PART1_BASE;
> +		return EXYNOS4210_GPIO_PART1_BASE;
>  	else
> -		return S5PC210_GPIO_PART2_BASE;
> +		return EXYNOS4210_GPIO_PART2_BASE;
>
>  	return 0;
>  }
> diff --git a/arch/arm/include/asm/arch-s5pc2xx/mmc.h
> b/arch/arm/include/asm/arch-exynos4/mmc.h
> similarity index 100%
> rename from arch/arm/include/asm/arch-s5pc2xx/mmc.h
> rename to arch/arm/include/asm/arch-exynos4/mmc.h
> diff --git a/arch/arm/include/asm/arch-s5pc2xx/pwm.h
> b/arch/arm/include/asm/arch-exynos4/pwm.h
> similarity index 100%
> rename from arch/arm/include/asm/arch-s5pc2xx/pwm.h
> rename to arch/arm/include/asm/arch-exynos4/pwm.h
> diff --git a/arch/arm/include/asm/arch-s5pc2xx/sromc.h
> b/arch/arm/include/asm/arch-exynos4/sromc.h
> similarity index 100%
> rename from arch/arm/include/asm/arch-s5pc2xx/sromc.h
> rename to arch/arm/include/asm/arch-exynos4/sromc.h
> diff --git a/arch/arm/include/asm/arch-s5pc2xx/sys_proto.h
> b/arch/arm/include/asm/arch-exynos4/sys_proto.h
> similarity index 100%
> rename from arch/arm/include/asm/arch-s5pc2xx/sys_proto.h
> rename to arch/arm/include/asm/arch-exynos4/sys_proto.h
> diff --git a/arch/arm/include/asm/arch-s5pc2xx/uart.h
> b/arch/arm/include/asm/arch-exynos4/uart.h
> similarity index 100%
> rename from arch/arm/include/asm/arch-s5pc2xx/uart.h
> rename to arch/arm/include/asm/arch-exynos4/uart.h
> diff --git a/board/samsung/origen/lowlevel_init.S
> b/board/samsung/origen/lowlevel_init.S
> index ddca1e2..a7fb934 100644
> --- a/board/samsung/origen/lowlevel_init.S
> +++ b/board/samsung/origen/lowlevel_init.S
> @@ -1,5 +1,5 @@
>  /*
> - * Lowlevel setup for ORIGEN board based on S5PV310
> + * Lowlevel setup for ORIGEN board based on EXYNOS4210
>   *
>   * Copyright (C) 2011 Samsung Electronics
>   *
> @@ -43,11 +43,11 @@ lowlevel_init:
>
>  	/* r5 has always zero */
>  	mov	r5, #0
> -	ldr	r7, =S5PC210_GPIO_PART1_BASE
> -	ldr	r6, =S5PC210_GPIO_PART2_BASE
> +	ldr	r7, =EXYNOS4210_GPIO_PART1_BASE
> +	ldr	r6, =EXYNOS4210_GPIO_PART2_BASE
>
>  	/* check reset status */
> -	ldr	r0, =(S5PC210_POWER_BASE + INFORM1_OFFSET)
> +	ldr	r0, =(EXYNOS4210_POWER_BASE + INFORM1_OFFSET)
>  	ldr	r1, [r0]
>
>  	/* AFTR wakeup reset */
> @@ -97,9 +97,9 @@ wakeup_reset:
>
>  exit_wakeup:
>  	/* Load return address and jump to kernel */
> -	ldr	r0, =(S5PC210_POWER_BASE + INFORM0_OFFSET)
> +	ldr	r0, =(EXYNOS4210_POWER_BASE + INFORM0_OFFSET)
>
> -	/* r1 = physical address of s5pc210_cpu_resume function */
> +	/* r1 = physical address of exynos4210_cpu_resume function */
>  	ldr	r1, [r0]
>
>  	/* Jump to kernel*/
> @@ -113,7 +113,7 @@ exit_wakeup:
>   */
>  system_clock_init:
>  	push	{lr}
> -	ldr	r0, =S5PC210_CLOCK_BASE
> +	ldr	r0, =EXYNOS4210_CLOCK_BASE
>
>  	/* APLL(1), MPLL(1), CORE(0), HPM(0) */
>  	ldr	r1, =CLK_SRC_CPU_VAL
> @@ -290,13 +290,13 @@ uart_asm_init:
>
>  	/* setup UART0-UART3 GPIOs (part1) */
>  	mov	r0, r7
> -	ldr	r1, =S5PC210_GPIO_A0_CON_VAL
> -	str	r1, [r0, #S5PC210_GPIO_A0_CON_OFFSET]
> -	ldr	r1, =S5PC210_GPIO_A1_CON_VAL
> -	str	r1, [r0, #S5PC210_GPIO_A1_CON_OFFSET]
> +	ldr	r1, =EXYNOS4210_GPIO_A0_CON_VAL
> +	str	r1, [r0, #EXYNOS4210_GPIO_A0_CON_OFFSET]
> +	ldr	r1, =EXYNOS4210_GPIO_A1_CON_VAL
> +	str	r1, [r0, #EXYNOS4210_GPIO_A1_CON_OFFSET]
>
> -	ldr r0, =S5PC210_UART_BASE
> -	add r0, r0, #S5PC210_DEFAULT_UART_OFFSET
> +	ldr r0, =EXYNOS4210_UART_BASE
> +	add r0, r0, #EXYNOS4210_DEFAULT_UART_OFFSET
>
>  	ldr	r1, =ULCON_VAL
>  	str	r1, [r0, #ULCON_OFFSET]
> diff --git a/board/samsung/origen/mem_setup.S
> b/board/samsung/origen/mem_setup.S
> index a798848..6a41046 100644
> --- a/board/samsung/origen/mem_setup.S
> +++ b/board/samsung/origen/mem_setup.S
> @@ -1,5 +1,5 @@
>  /*
> - * Memory setup for ORIGEN board based on S5PV310
> + * Memory setup for ORIGEN board based on EXYNOS4210
>   *
>   * Copyright (C) 2011 Samsung Electronics
>   *
> @@ -38,7 +38,7 @@ mem_ctrl_asm_init:
>  	str r1, [r0]
>
>  #ifdef SET_MIU
> -	ldr	r0, =S5PC210_MIU_BASE
> +	ldr	r0, =EXYNOS4210_MIU_BASE
>  	/* Interleave: 2Bit, Interleave_bit1: 0x21, Interleave_bit2: 0x7 */
>  	ldr	r1, =0x20001507
>  	str	r1, [r0, #APB_SFR_INTERLEAVE_CONF_OFFSET]
> @@ -48,7 +48,7 @@ mem_ctrl_asm_init:
>  	str	r1, [r0, #APB_SFR_ARBRITATION_CONF_OFFSET]
>  #endif
>  	/* DREX0 */
> -	ldr	r0, =S5PC210_DMC0_BASE
> +	ldr	r0, =EXYNOS4210_DMC0_BASE
>
>  	/*
>  	 * DLL Parameter Setting:
> @@ -229,7 +229,7 @@ mem_ctrl_asm_init:
>  	bne	8b
>
>  	/* DREX1 */
> -	ldr	r0, =S5PC210_DMC1_BASE	@0x10410000
> +	ldr	r0, =EXYNOS4210_DMC1_BASE	@0x10410000
>
>  	/*
>  	 * DLL Parameter Setting:
> @@ -410,11 +410,11 @@ mem_ctrl_asm_init:
>  	bne	8b
>
>  	/* turn on DREX0, DREX1 */
> -	ldr	r0, =S5PC210_DMC0_BASE
> +	ldr	r0, =EXYNOS4210_DMC0_BASE
>  	ldr	r1, =0x0FFF303a
>  	str	r1, [r0, #DMC_CONCONTROL]
>
> -	ldr	r0, =S5PC210_DMC1_BASE
> +	ldr	r0, =EXYNOS4210_DMC1_BASE
>  	ldr	r1, =0x0FFF303a
>  	str	r1, [r0, #DMC_CONCONTROL]
>
> diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
> index 8882646..14cbb9b 100644
> --- a/board/samsung/origen/origen.c
> +++ b/board/samsung/origen/origen.c
> @@ -27,13 +27,13 @@
>  #include <asm/arch/mmc.h>
>
>  DECLARE_GLOBAL_DATA_PTR;
> -struct s5pc210_gpio_part1 *gpio1;
> -struct s5pc210_gpio_part2 *gpio2;
> +struct exynos4210_gpio_part1 *gpio1;
> +struct exynos4210_gpio_part2 *gpio2;
>
>  int board_init(void)
>  {
> -	gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE;
> -	gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE;
> +	gpio1 = (struct exynos4210_gpio_part1 *) EXYNOS4210_GPIO_PART1_BASE;
> +	gpio2 = (struct exynos4210_gpio_part2 *) EXYNOS4210_GPIO_PART2_BASE;
>
>  	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
>  	return 0;
> diff --git a/board/samsung/origen/origen_setup.h
> b/board/samsung/origen/origen_setup.h
> index 63d85d8..fa9146f 100644
> --- a/board/samsung/origen/origen_setup.h
> +++ b/board/samsung/origen/origen_setup.h
> @@ -98,8 +98,8 @@
>  #define INFORM1_OFFSET			0x804
>
>  /* GPIO Offsets for UART: GPIO Contol Register */
> -#define S5PC210_GPIO_A0_CON_OFFSET	0x00
> -#define S5PC210_GPIO_A1_CON_OFFSET	0x20
> +#define EXYNOS4210_GPIO_A0_CON_OFFSET	0x00
> +#define EXYNOS4210_GPIO_A1_CON_OFFSET	0x20
>
>  /* UART Register offsets */
>  #define ULCON_OFFSET		0x00
> @@ -416,8 +416,8 @@
>   * UART GPIO_A0/GPIO_A1 Control Register Value
>   * 0x2: UART Function
>   */
> -#define S5PC210_GPIO_A0_CON_VAL	0x22222222
> -#define S5PC210_GPIO_A1_CON_VAL	0x222222
> +#define EXYNOS4210_GPIO_A0_CON_VAL	0x22222222
> +#define EXYNOS4210_GPIO_A1_CON_VAL	0x222222
>
>  /* ULCON: UART Line Control Value 8N1 */
>  #define WORD_LEN_5_BIT		0x00
> diff --git a/board/samsung/smdkv310/lowlevel_init.S
> b/board/samsung/smdkv310/lowlevel_init.S
> index 58b737b..10f1b89 100644
> --- a/board/samsung/smdkv310/lowlevel_init.S
> +++ b/board/samsung/smdkv310/lowlevel_init.S
> @@ -1,5 +1,5 @@
>  /*
> - * Lowlevel setup for SMDKV310 board based on S5PC210
> + * Lowlevel setup for SMDKV310 board based on EXYNOS4210
>   *
>   * Copyright (C) 2011 Samsung Electronics
>   *
> @@ -45,11 +45,11 @@ lowlevel_init:
>
>  	/* r5 has always zero */
>  	mov	r5, #0
> -	ldr	r7, =S5PC210_GPIO_PART1_BASE
> -	ldr	r6, =S5PC210_GPIO_PART2_BASE
> +	ldr	r7, =EXYNOS4210_GPIO_PART1_BASE
> +	ldr	r6, =EXYNOS4210_GPIO_PART2_BASE
>
>  	/* check reset status  */
> -	ldr     r0, =(S5PC210_POWER_BASE + 0x81C)	@ INFORM7
> +	ldr     r0, =(EXYNOS4210_POWER_BASE + 0x81C)	@ INFORM7
>  	ldr     r1, [r0]
>
>  	/* AFTR wakeup reset */
> @@ -95,9 +95,9 @@ wakeup_reset:
>
>  exit_wakeup:
>  	/* Load return address and jump to kernel */
> -	ldr     r0, =(S5PC210_POWER_BASE + 0x800)	@ INFORM0
> +	ldr     r0, =(EXYNOS4210_POWER_BASE + 0x800)	@ INFORM0
>
> -	/* r1 = physical address of s5pc210_cpu_resume function */
> +	/* r1 = physical address of exynos4210_cpu_resume function */
>  	ldr	r1, [r0]
>
>  	/* Jump to kernel*/
> @@ -111,7 +111,7 @@ exit_wakeup:
>   */
>  system_clock_init:
>  	push	{lr}
> -	ldr	r0, =S5PC210_CLOCK_BASE
> +	ldr	r0, =EXYNOS4210_CLOCK_BASE
>
>  	/* APLL(1), MPLL(1), CORE(0), HPM(0) */
>  	ldr	r1, =0x0101
> @@ -388,12 +388,12 @@ uart_asm_init:
>  	/* setup UART0-UART3 GPIOs (part1) */
>  	mov	r0, r7
>  	ldr	r1, =0x22222222
> -	str	r1, [r0, #0x00]			@ S5PC210_GPIO_A0_OFFSET
> +	str	r1, [r0, #0x00]			@ EXYNOS4210_GPIO_A0_OFFSET
>  	ldr	r1, =0x00222222
> -	str	r1, [r0, #0x20]			@ S5PC210_GPIO_A1_OFFSET
> +	str	r1, [r0, #0x20]			@ EXYNOS4210_GPIO_A1_OFFSET
>
> -	ldr r0, =S5PC210_UART_BASE
> -	add r0, r0, #S5PC210_DEFAULT_UART_OFFSET
> +	ldr r0, =EXYNOS4210_UART_BASE
> +	add r0, r0, #EXYNOS4210_DEFAULT_UART_OFFSET
>
>  	ldr r1, =0x3C5
>  	str	r1, [r0, #0x4]
> diff --git a/board/samsung/smdkv310/mem_setup.S
> b/board/samsung/smdkv310/mem_setup.S
> index 73aebe3..df62f5f 100644
> --- a/board/samsung/smdkv310/mem_setup.S
> +++ b/board/samsung/smdkv310/mem_setup.S
> @@ -1,5 +1,5 @@
>  /*
> - * Memory setup for SMDKV310 board based on S5PC210
> + * Memory setup for SMDKV310 board based on EXYNOS4210
>   *
>   * Copyright (C) 2011 Samsung Electronics
>   *
> @@ -54,7 +54,7 @@ mem_ctrl_asm_init:
>  	str r1, [r0]
>
>  #ifdef SET_MIU
> -	ldr	r0, =S5PC210_MIU_BASE	@0x10600000
> +	ldr	r0, =EXYNOS4210_MIU_BASE	@0x10600000
>  #ifdef CONFIG_MIU_1BIT_INTERLEAVED
>  	ldr	r1, =0x0000000c
>  	str	r1, [r0, #0x400]	@MIU_INTLV_CONFIG
> @@ -89,7 +89,7 @@ mem_ctrl_asm_init:
>  #endif
>  #endif
>  	/* DREX0 */
> -	ldr	r0, =S5PC210_DMC0_BASE	@0x10400000
> +	ldr	r0, =EXYNOS4210_DMC0_BASE	@0x10400000
>
>  	ldr	r1, =0xe0000086
>  	str	r1, [r0, #0x1C]		@DMC_PHYCONTROL1
> @@ -221,7 +221,7 @@ mem_ctrl_asm_init:
>  	bne	8b
>
>  	/* DREX1 */
> -	ldr	r0, =S5PC210_DMC1_BASE	@0x10410000
> +	ldr	r0, =EXYNOS4210_DMC1_BASE	@0x10410000
>
>  	ldr	r1, =0xe0000086
>  	str	r1, [r0, #0x1C]		@DMC_PHYCONTROL1
> diff --git a/board/samsung/smdkv310/smdkv310.c
> b/board/samsung/smdkv310/smdkv310.c
> index d9caca7..44cd549 100644
> --- a/board/samsung/smdkv310/smdkv310.c
> +++ b/board/samsung/smdkv310/smdkv310.c
> @@ -29,8 +29,8 @@
>  #include <asm/arch/sromc.h>
>
>  DECLARE_GLOBAL_DATA_PTR;
> -struct s5pc210_gpio_part1 *gpio1;
> -struct s5pc210_gpio_part2 *gpio2;
> +struct exynos4210_gpio_part1 *gpio1;
> +struct exynos4210_gpio_part2 *gpio2;
>
>  static void smc9115_pre_init(void)
>  {
> @@ -52,8 +52,8 @@ static void smc9115_pre_init(void)
>
>  int board_init(void)
>  {
> -	gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE;
> -	gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE;
> +	gpio1 = (struct exynos4210_gpio_part1 *) EXYNOS4210_GPIO_PART1_BASE;
> +	gpio2 = (struct exynos4210_gpio_part2 *) EXYNOS4210_GPIO_PART2_BASE;
>
>  	smc9115_pre_init();
>
> diff --git a/board/samsung/universal_c210/lowlevel_init.S
> b/board/samsung/universal_c210/lowlevel_init.S
> index 67635bb..76bbba5 100644
> --- a/board/samsung/universal_c210/lowlevel_init.S
> +++ b/board/samsung/universal_c210/lowlevel_init.S
> @@ -1,5 +1,5 @@
>  /*
> - * Lowlevel setup for universal board based on S5PC210
> + * Lowlevel setup for universal board based on EXYNOS4210
>   *
>   * Copyright (C) 2010 Samsung Electronics
>   * Kyungmin Park <kyungmin.park@samsung.com>
> @@ -43,11 +43,11 @@ lowlevel_init:
>  	/* r5 has always zero */
>  	mov	r5, #0
>
> -	ldr	r7, =S5PC210_GPIO_PART1_BASE
> -	ldr	r6, =S5PC210_GPIO_PART2_BASE
> +	ldr	r7, =EXYNOS4210_GPIO_PART1_BASE
> +	ldr	r6, =EXYNOS4210_GPIO_PART2_BASE
>
>  	/* System Timer */
> -	ldr	r0, =S5PC210_SYSTIMER_BASE
> +	ldr	r0, =EXYNOS4210_SYSTIMER_BASE
>  	ldr	r1, =0x5000
>  	str	r1, [r0, #0x0]
>  	ldr	r1, =0xffffffff
> @@ -57,7 +57,7 @@ lowlevel_init:
>
>  	/* PMIC manual reset */
>  	/* nPOWER: XEINT_23: GPX2[7] */
> -	add	r0, r6, #0xC40			@ S5PC210_GPIO_X2_OFFSET
> +	add	r0, r6, #0xC40			@ EXYNOS4210_GPIO_X2_OFFSET
>  	ldr	r1, [r0, #0x0]
>  	bic	r1, r1, #(0xf << 28)		@ 28 = 7 * 4-bit
>  	orr	r1, r1, #(0x1 << 28)		@ Output
> @@ -71,7 +71,7 @@ lowlevel_init:
>  	bl	system_clock_init
>
>  	/* Disable Watchdog */
> -	ldr	r0, =S5PC210_WATCHDOG_BASE		@0x10060000
> +	ldr	r0, =EXYNOS4210_WATCHDOG_BASE		@0x10060000
>  	str	r5, [r0]
>
>  	/* UART */
> @@ -99,12 +99,12 @@ uart_asm_init:
>  	 */
>  	mov	r0, r7
>  	ldr	r1, =0x22222222
> -	str	r1, [r0, #0x00]			@ S5PC210_GPIO_A0_OFFSET
> +	str	r1, [r0, #0x00]			@ EXYNOS4210_GPIO_A0_OFFSET
>  	ldr	r1, =0x00223322
> -	str	r1, [r0, #0x20]			@ S5PC210_GPIO_A1_OFFSET
> +	str	r1, [r0, #0x20]			@ EXYNOS4210_GPIO_A1_OFFSET
>
> -	/* UART_SEL GPY4[7] (part2) at S5PC210 */
> -	add	r0, r6, #0x1A0			@ S5PC210_GPIO_Y4_OFFSET
> +	/* UART_SEL GPY4[7] (part2) at EXYNOS4210 */
> +	add	r0, r6, #0x1A0			@ EXYNOS4210_GPIO_Y4_OFFSET
>  	ldr	r1, [r0, #0x0]
>  	bic	r1, r1, #(0xf << 28)		@ 28 = 7 * 4-bit
>  	orr	r1, r1, #(0x1 << 28)
> @@ -125,7 +125,7 @@ uart_asm_init:
>  	nop
>
>  system_clock_init:
> -	ldr	r0, =S5PC210_CLOCK_BASE
> +	ldr	r0, =EXYNOS4210_CLOCK_BASE
>
>  	/* APLL(1), MPLL(1), CORE(0), HPM(0) */
>  	ldr	r1, =0x0101
> @@ -326,7 +326,7 @@ system_clock_init:
>  	nop
>
>  system_power_init:
> -	ldr	r0, =S5PC210_POWER_BASE		@ 0x10020000
> +	ldr	r0, =EXYNOS4210_POWER_BASE		@ 0x10020000
>
>  	ldr	r2, =0x330C			@ PS_HOLD_CONTROL
>  	ldr	r1, [r0, r2]
> diff --git a/board/samsung/universal_c210/universal.c
> b/board/samsung/universal_c210/universal.c
> index d767eaa..0542a16 100644
> --- a/board/samsung/universal_c210/universal.c
> +++ b/board/samsung/universal_c210/universal.c
> @@ -31,8 +31,8 @@
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> -struct s5pc210_gpio_part1 *gpio1;
> -struct s5pc210_gpio_part2 *gpio2;
> +struct exynos4210_gpio_part1 *gpio1;
> +struct exynos4210_gpio_part2 *gpio2;
>  unsigned int board_rev;
>
>  u32 get_board_rev(void)
> @@ -49,8 +49,8 @@ static void check_hw_revision(void);
>
>  int board_init(void)
>  {
> -	gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE;
> -	gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE;
> +	gpio1 = (struct exynos4210_gpio_part1 *) EXYNOS4210_GPIO_PART1_BASE;
> +	gpio2 = (struct exynos4210_gpio_part2 *) EXYNOS4210_GPIO_PART2_BASE;
>
>  	gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
>  	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> diff --git a/boards.cfg b/boards.cfg
> index 7c63449..98b1b3c 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -201,9 +201,9 @@ omap4_sdp4430                arm         armv7
> sdp4430             ti
>  omap5_evm                    arm         armv7       omap5_evm
> ti		omap5
>  s5p_goni                     arm         armv7       goni
> samsung        s5pc1xx
>  smdkc100                     arm         armv7       smdkc100
> samsung        s5pc1xx
> -origen			     arm	 armv7	     origen		 samsung	s5pc2xx
> -s5pc210_universal            arm         armv7       universal_c210
> samsung        s5pc2xx
> -smdkv310		     arm	 armv7	     smdkv310		 samsung	s5pc2xx
> +origen			     arm	 armv7	     origen		 samsung	exynos4
> +s5pc210_universal            arm         armv7       universal_c210
> samsung        exynos4
> +smdkv310		     arm	 armv7	     smdkv310		 samsung	exynos4
>  harmony                      arm         armv7       harmony
> nvidia         tegra2
>  seaboard                     arm         armv7       seaboard
> nvidia         tegra2
>  u8500_href                   arm         armv7       u8500
> st-ericsson    u8500
> diff --git a/include/configs/origen.h b/include/configs/origen.h
> index 380ef4f..6099e87 100644
> --- a/include/configs/origen.h
> +++ b/include/configs/origen.h
> @@ -1,7 +1,7 @@
>  /*
>   * Copyright (C) 2011 Samsung Electronics
>   *
> - * Configuration settings for the SAMSUNG ORIGEN (S5PV310) board.
> + * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
>   *
>   * See file CREDITS for list of people who contributed to this
>   * project.
> @@ -28,7 +28,7 @@
>  /* High Level Configuration Options */
>  #define CONFIG_SAMSUNG			1	/* SAMSUNG core */
>  #define CONFIG_S5P			1	/* S5P Family */
> -#define CONFIG_S5PC210			1	/* which is in a S5PC210 SoC */
> +#define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
>  #define CONFIG_ORIGEN			1	/* working with ORIGEN*/
>
>  #include <asm/arch/cpu.h>		/* get chip and board defs */
> @@ -68,7 +68,7 @@
>  #define CONFIG_SERIAL_MULTI		1
>  #define CONFIG_SERIAL2			1	/* use SERIAL 2 */
>  #define CONFIG_BAUDRATE			115200
> -#define S5PC210_DEFAULT_UART_OFFSET	0x020000
> +#define EXYNOS4210_DEFAULT_UART_OFFSET	0x020000
>
>  /* SD/MMC configuration */
>  #define CONFIG_GENERIC_MMC		1
> diff --git a/include/configs/s5pc210_universal.h
> b/include/configs/s5pc210_universal.h
> index cc14f97..0e390bd 100644
> --- a/include/configs/s5pc210_universal.h
> +++ b/include/configs/s5pc210_universal.h
> @@ -2,7 +2,7 @@
>   * Copyright (C) 2010 Samsung Electronics
>   * Minkyu Kang <mk7.kang@samsung.com>
>   *
> - * Configuation settings for the SAMSUNG Universal (s5pc100) board.
> + * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board.
>   *
>   * See file CREDITS for list of people who contributed to this
>   * project.
> @@ -32,7 +32,7 @@
>   */
>  #define CONFIG_SAMSUNG		1	/* in a SAMSUNG core */
>  #define CONFIG_S5P		1	/* which is in a S5P Family */
> -#define CONFIG_S5PC210		1	/* which is in a S5PC210 */
> +#define CONFIG_EXYNOS4210	1	/* which is in a EXYNOS4210 */
>  #define CONFIG_UNIVERSAL	1	/* working with Universal */
>
>  #include <asm/arch/cpu.h>		/* get chip and board defs */
> @@ -47,7 +47,7 @@
>  #define CONFIG_SYS_SDRAM_BASE		0x40000000
>  #define CONFIG_SYS_TEXT_BASE		0x44800000
>
> -/* input clock of PLL: Universal has 24MHz input clock at S5PC210 */
> +/* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */
>  #define CONFIG_SYS_CLK_FREQ_C210	24000000
>
>  #define CONFIG_SETUP_MEMORY_TAGS
> @@ -249,8 +249,8 @@
>  /*
>   * I2C Settings
>   */
> -#define CONFIG_SOFT_I2C_GPIO_SCL s5pc210_gpio_part1_get_nr(b, 7)
> -#define CONFIG_SOFT_I2C_GPIO_SDA s5pc210_gpio_part1_get_nr(b, 6)
> +#define CONFIG_SOFT_I2C_GPIO_SCL exynos4210_gpio_part1_get_nr(b, 7)
> +#define CONFIG_SOFT_I2C_GPIO_SDA exynos4210_gpio_part1_get_nr(b, 6)
>
>  #define CONFIG_SOFT_I2C
>  #define CONFIG_SOFT_I2C_READ_REPEATED_START
> diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
> index fc8bb06..f81e4d7 100644
> --- a/include/configs/smdkv310.h
> +++ b/include/configs/smdkv310.h
> @@ -1,7 +1,7 @@
>  /*
>   * Copyright (C) 2011 Samsung Electronics
>   *
> - * Configuration settings for the SAMSUNG SMDKV310 (S5PC210) board.
> + * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
>   *
>   * See file CREDITS for list of people who contributed to this
>   * project.
> @@ -28,7 +28,7 @@
>  /* High Level Configuration Options */
>  #define CONFIG_SAMSUNG			1	/* in a SAMSUNG core */
>  #define CONFIG_S5P			1	/* S5P Family */
> -#define CONFIG_S5PC210			1	/* which is in a S5PC210 SoC */
> +#define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
>  #define CONFIG_SMDKV310			1	/* working with SMDKV310*/
>
>  #include <asm/arch/cpu.h>		/* get chip and board defs */
> @@ -65,7 +65,7 @@
>  #define CONFIG_SERIAL_MULTI		1
>  #define CONFIG_SERIAL1			1	/* use SERIAL 1 */
>  #define CONFIG_BAUDRATE			115200
> -#define S5PC210_DEFAULT_UART_OFFSET	0x010000
> +#define EXYNOS4210_DEFAULT_UART_OFFSET	0x010000
>
>  /* SD/MMC configuration */
>  #define CONFIG_GENERIC_MMC		1
> --
> 1.7.5.4
>
>
> _______________________________________________
> linaro-dev mailing list
> linaro-dev@lists.linaro.org
> http://lists.linaro.org/mailman/listinfo/linaro-dev
>

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index 37bbb34..d493e4e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -691,12 +691,12 @@  Minkyu Kang <mk7.kang@samsung.com>
 
 	SMDKC100		ARM ARMV7 (S5PC100 SoC)
 	s5p_goni		ARM ARMV7 (S5PC110 SoC)
-	s5pc210_universal	ARM ARMV7 (S5PC210 SoC)
+	s5pc210_universal	ARM ARMV7 (EXYNOS4210 SoC)
 
 Chander Kashyap <k.chander@samsung.com>
 
-	origen			ARM ARMV7 (S5PC210 SoC)
-	SMDKV310		ARM ARMV7 (S5PC210 SoC)
+	origen			ARM ARMV7 (EXYNOS4210 SoC)
+	SMDKV310		ARM ARMV7 (EXYNOS4210 SoC)
 
 Torsten Koschorrek <koschorrek@synertronixx.de>
 	scb9328		ARM920T (i.MXL)
diff --git a/Makefile b/Makefile
index fb658f4..646b105 100644
--- a/Makefile
+++ b/Makefile
@@ -296,7 +296,7 @@  endif
 ifeq ($(SOC),s5pc1xx)
 LIBS += $(CPUDIR)/s5p-common/libs5p-common.o
 endif
-ifeq ($(SOC),s5pc2xx)
+ifeq ($(SOC),exynos4)
 LIBS += $(CPUDIR)/s5p-common/libs5p-common.o
 endif
 
diff --git a/arch/arm/cpu/armv7/s5pc2xx/Makefile b/arch/arm/cpu/armv7/exynos4/Makefile
similarity index 100%
rename from arch/arm/cpu/armv7/s5pc2xx/Makefile
rename to arch/arm/cpu/armv7/exynos4/Makefile
diff --git a/arch/arm/cpu/armv7/s5pc2xx/clock.c b/arch/arm/cpu/armv7/exynos4/clock.c
similarity index 80%
rename from arch/arm/cpu/armv7/s5pc2xx/clock.c
rename to arch/arm/cpu/armv7/exynos4/clock.c
index 5ecd475..668166a 100644
--- a/arch/arm/cpu/armv7/s5pc2xx/clock.c
+++ b/arch/arm/cpu/armv7/exynos4/clock.c
@@ -30,11 +30,11 @@ 
 #define CONFIG_SYS_CLK_FREQ_C210	24000000
 #endif
 
-/* s5pc210: return pll clock frequency */
-static unsigned long s5pc210_get_pll_clk(int pllreg)
+/* exynos4210: return pll clock frequency */
+static unsigned long exynos4210_get_pll_clk(int pllreg)
 {
-	struct s5pc210_clock *clk =
-		(struct s5pc210_clock *)samsung_get_base_clock();
+	struct exynos4210_clock *clk =
+		(struct exynos4210_clock *)samsung_get_base_clock();
 	unsigned long r, m, p, s, k = 0, mask, fout;
 	unsigned int freq;
 
@@ -96,11 +96,11 @@  static unsigned long s5pc210_get_pll_clk(int pllreg)
 	return fout;
 }
 
-/* s5pc210: return ARM clock frequency */
-static unsigned long s5pc210_get_arm_clk(void)
+/* exynos4210: return ARM clock frequency */
+static unsigned long exynos4210_get_arm_clk(void)
 {
-	struct s5pc210_clock *clk =
-		(struct s5pc210_clock *)samsung_get_base_clock();
+	struct exynos4210_clock *clk =
+		(struct exynos4210_clock *)samsung_get_base_clock();
 	unsigned long div;
 	unsigned long dout_apll;
 	unsigned int apll_ratio;
@@ -115,11 +115,11 @@  static unsigned long s5pc210_get_arm_clk(void)
 	return dout_apll;
 }
 
-/* s5pc210: return pwm clock frequency */
-static unsigned long s5pc210_get_pwm_clk(void)
+/* exynos4210: return pwm clock frequency */
+static unsigned long exynos4210_get_pwm_clk(void)
 {
-	struct s5pc210_clock *clk =
-		(struct s5pc210_clock *)samsung_get_base_clock();
+	struct exynos4210_clock *clk =
+		(struct exynos4210_clock *)samsung_get_base_clock();
 	unsigned long pclk, sclk;
 	unsigned int sel;
 	unsigned int ratio;
@@ -158,11 +158,11 @@  static unsigned long s5pc210_get_pwm_clk(void)
 	return pclk;
 }
 
-/* s5pc210: return uart clock frequency */
-static unsigned long s5pc210_get_uart_clk(int dev_index)
+/* exynos4210: return uart clock frequency */
+static unsigned long exynos4210_get_uart_clk(int dev_index)
 {
-	struct s5pc210_clock *clk =
-		(struct s5pc210_clock *)samsung_get_base_clock();
+	struct exynos4210_clock *clk =
+		(struct exynos4210_clock *)samsung_get_base_clock();
 	unsigned long uclk, sclk;
 	unsigned int sel;
 	unsigned int ratio;
@@ -205,11 +205,11 @@  static unsigned long s5pc210_get_uart_clk(int dev_index)
 	return uclk;
 }
 
-/* s5pc210: set the mmc clock */
-static void s5pc210_set_mmc_clk(int dev_index, unsigned int div)
+/* exynos4210: set the mmc clock */
+static void exynos4210_set_mmc_clk(int dev_index, unsigned int div)
 {
-	struct s5pc210_clock *clk =
-		(struct s5pc210_clock *)samsung_get_base_clock();
+	struct exynos4210_clock *clk =
+		(struct exynos4210_clock *)samsung_get_base_clock();
 	unsigned int addr;
 	unsigned int val;
 
@@ -234,25 +234,25 @@  static void s5pc210_set_mmc_clk(int dev_index, unsigned int div)
 
 unsigned long get_pll_clk(int pllreg)
 {
-	return s5pc210_get_pll_clk(pllreg);
+	return exynos4210_get_pll_clk(pllreg);
 }
 
 unsigned long get_arm_clk(void)
 {
-	return s5pc210_get_arm_clk();
+	return exynos4210_get_arm_clk();
 }
 
 unsigned long get_pwm_clk(void)
 {
-	return s5pc210_get_pwm_clk();
+	return exynos4210_get_pwm_clk();
 }
 
 unsigned long get_uart_clk(int dev_index)
 {
-	return s5pc210_get_uart_clk(dev_index);
+	return exynos4210_get_uart_clk(dev_index);
 }
 
 void set_mmc_clk(int dev_index, unsigned int div)
 {
-	s5pc210_set_mmc_clk(dev_index, div);
+	exynos4210_set_mmc_clk(dev_index, div);
 }
diff --git a/arch/arm/cpu/armv7/s5pc2xx/soc.c b/arch/arm/cpu/armv7/exynos4/soc.c
similarity index 100%
rename from arch/arm/cpu/armv7/s5pc2xx/soc.c
rename to arch/arm/cpu/armv7/exynos4/soc.c
diff --git a/arch/arm/include/asm/arch-s5pc2xx/adc.h b/arch/arm/include/asm/arch-exynos4/adc.h
similarity index 100%
rename from arch/arm/include/asm/arch-s5pc2xx/adc.h
rename to arch/arm/include/asm/arch-exynos4/adc.h
diff --git a/arch/arm/include/asm/arch-s5pc2xx/clk.h b/arch/arm/include/asm/arch-exynos4/clk.h
similarity index 100%
rename from arch/arm/include/asm/arch-s5pc2xx/clk.h
rename to arch/arm/include/asm/arch-exynos4/clk.h
diff --git a/arch/arm/include/asm/arch-s5pc2xx/clock.h b/arch/arm/include/asm/arch-exynos4/clock.h
similarity index 99%
rename from arch/arm/include/asm/arch-s5pc2xx/clock.h
rename to arch/arm/include/asm/arch-exynos4/clock.h
index 0ff8cf8..b4190a5 100644
--- a/arch/arm/include/asm/arch-s5pc2xx/clock.h
+++ b/arch/arm/include/asm/arch-exynos4/clock.h
@@ -23,7 +23,7 @@ 
 #define __ASM_ARM_ARCH_CLOCK_H_
 
 #ifndef __ASSEMBLY__
-struct s5pc210_clock {
+struct exynos4210_clock {
 	unsigned char	res1[0x4200];
 	unsigned int	src_leftbus;
 	unsigned char	res2[0x1fc];
diff --git a/arch/arm/include/asm/arch-s5pc2xx/cpu.h b/arch/arm/include/asm/arch-exynos4/cpu.h
similarity index 64%
rename from arch/arm/include/asm/arch-s5pc2xx/cpu.h
rename to arch/arm/include/asm/arch-exynos4/cpu.h
index f9015c7..905f38c 100644
--- a/arch/arm/include/asm/arch-s5pc2xx/cpu.h
+++ b/arch/arm/include/asm/arch-exynos4/cpu.h
@@ -19,33 +19,33 @@ 
  *
  */
 
-#ifndef _S5PC2XX_CPU_H
-#define _S5PC2XX_CPU_H
+#ifndef _EXYNOS4_CPU_H
+#define _EXYNOS4_CPU_H
 
 #define S5PC2XX_ADDR_BASE	0x10000000
 
-/* S5PC210 */
-#define S5PC210_GPIO_PART3_BASE	0x03860000
-#define S5PC210_PRO_ID		0x10000000
-#define S5PC210_POWER_BASE	0x10020000
-#define S5PC210_SWRESET		0x10020400
-#define S5PC210_CLOCK_BASE	0x10030000
-#define S5PC210_SYSTIMER_BASE	0x10050000
-#define S5PC210_WATCHDOG_BASE	0x10060000
-#define S5PC210_MIU_BASE	0x10600000
-#define S5PC210_DMC0_BASE	0x10400000
-#define S5PC210_DMC1_BASE	0x10410000
-#define S5PC210_GPIO_PART2_BASE	0x11000000
-#define S5PC210_GPIO_PART1_BASE	0x11400000
-#define S5PC210_FIMD_BASE	0x11C00000
-#define S5PC210_USBOTG_BASE	0x12480000
-#define S5PC210_MMC_BASE	0x12510000
-#define S5PC210_SROMC_BASE	0x12570000
-#define S5PC210_USBPHY_BASE	0x125B0000
-#define S5PC210_UART_BASE	0x13800000
-#define S5PC210_ADC_BASE	0x13910000
-#define S5PC210_PWMTIMER_BASE	0x139D0000
-#define S5PC210_MODEM_BASE	0x13A00000
+/* EXYNOS4210 */
+#define EXYNOS4210_GPIO_PART3_BASE	0x03860000
+#define EXYNOS4210_PRO_ID		0x10000000
+#define EXYNOS4210_POWER_BASE		0x10020000
+#define EXYNOS4210_SWRESET		0x10020400
+#define EXYNOS4210_CLOCK_BASE		0x10030000
+#define EXYNOS4210_SYSTIMER_BASE	0x10050000
+#define EXYNOS4210_WATCHDOG_BASE	0x10060000
+#define EXYNOS4210_MIU_BASE		0x10600000
+#define EXYNOS4210_DMC0_BASE		0x10400000
+#define EXYNOS4210_DMC1_BASE		0x10410000
+#define EXYNOS4210_GPIO_PART2_BASE	0x11000000
+#define EXYNOS4210_GPIO_PART1_BASE	0x11400000
+#define EXYNOS4210_FIMD_BASE		0x11C00000
+#define EXYNOS4210_USBOTG_BASE		0x12480000
+#define EXYNOS4210_MMC_BASE		0x12510000
+#define EXYNOS4210_SROMC_BASE		0x12570000
+#define EXYNOS4210_USBPHY_BASE		0x125B0000
+#define EXYNOS4210_UART_BASE		0x13800000
+#define EXYNOS4210_ADC_BASE		0x13910000
+#define EXYNOS4210_PWMTIMER_BASE	0x139D0000
+#define EXYNOS4210_MODEM_BASE		0x13A00000
 
 #ifndef __ASSEMBLY__
 #include <asm/io.h>
@@ -60,12 +60,12 @@  static inline int s5p_get_cpu_rev(void)
 
 static inline void s5p_set_cpu_id(void)
 {
-	s5p_cpu_id = readl(S5PC210_PRO_ID);
+	s5p_cpu_id = readl(EXYNOS4210_PRO_ID);
 	s5p_cpu_id = (0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12));
 
 	/*
-	 * 0xC200: S5PC210 EVT0
-	 * 0xC210: S5PC210 EVT1
+	 * 0xC200: EXYNOS4210 EVT0
+	 * 0xC210: EXYNOS4210 EVT1
 	 */
 	if (s5p_cpu_id == 0xC200) {
 		s5p_cpu_id |= 0x10;
@@ -81,13 +81,13 @@  static inline int cpu_is_##type(void)			\
 	return s5p_cpu_id == id ? 1 : 0;		\
 }
 
-IS_SAMSUNG_TYPE(s5pc210, 0xc210)
+IS_SAMSUNG_TYPE(exynos4210, 0xc210)
 
 #define SAMSUNG_BASE(device, base)				\
 static inline unsigned int samsung_get_base_##device(void)	\
 {								\
-	if (cpu_is_s5pc210())					\
-		return S5PC210_##base;				\
+	if (cpu_is_exynos4210())					\
+		return EXYNOS4210_##base;				\
 	else							\
 		return 0;					\
 }
@@ -110,4 +110,4 @@  SAMSUNG_BASE(usb_otg, USBOTG_BASE)
 SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
 #endif
 
-#endif	/* _S5PC2XX_CPU_H */
+#endif	/* _EXYNOS4_CPU_H */
diff --git a/arch/arm/include/asm/arch-s5pc2xx/gpio.h b/arch/arm/include/asm/arch-exynos4/gpio.h
similarity index 83%
rename from arch/arm/include/asm/arch-s5pc2xx/gpio.h
rename to arch/arm/include/asm/arch-exynos4/gpio.h
index 8be620c..a222cd7 100644
--- a/arch/arm/include/asm/arch-s5pc2xx/gpio.h
+++ b/arch/arm/include/asm/arch-exynos4/gpio.h
@@ -32,7 +32,7 @@  struct s5p_gpio_bank {
 	unsigned char	res1[8];
 };
 
-struct s5pc210_gpio_part1 {
+struct exynos4210_gpio_part1 {
 	struct s5p_gpio_bank a0;
 	struct s5p_gpio_bank a1;
 	struct s5p_gpio_bank b;
@@ -51,7 +51,7 @@  struct s5pc210_gpio_part1 {
 	struct s5p_gpio_bank f3;
 };
 
-struct s5pc210_gpio_part2 {
+struct exynos4210_gpio_part2 {
 	struct s5p_gpio_bank j0;
 	struct s5p_gpio_bank j1;
 	struct s5p_gpio_bank k0;
@@ -75,7 +75,7 @@  struct s5pc210_gpio_part2 {
 	struct s5p_gpio_bank x3;
 };
 
-struct s5pc210_gpio_part3 {
+struct exynos4210_gpio_part3 {
 	struct s5p_gpio_bank z;
 };
 
@@ -92,27 +92,27 @@  void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
 /* GPIO pins per bank  */
 #define GPIO_PER_BANK 8
 
-#define s5pc210_gpio_part1_get_nr(bank, pin) \
-	((((((unsigned int) &(((struct s5pc210_gpio_part1 *) \
-			       S5PC210_GPIO_PART1_BASE)->bank)) \
-	    - S5PC210_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \
+#define exynos4210_gpio_part1_get_nr(bank, pin) \
+	((((((unsigned int) &(((struct exynos4210_gpio_part1 *) \
+			       EXYNOS4210_GPIO_PART1_BASE)->bank)) \
+	    - EXYNOS4210_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \
 	  * GPIO_PER_BANK) + pin)
 
-#define GPIO_PART1_MAX ((sizeof(struct s5pc210_gpio_part1) \
+#define GPIO_PART1_MAX ((sizeof(struct exynos4210_gpio_part1) \
 			    / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
 
-#define s5pc210_gpio_part2_get_nr(bank, pin) \
-	(((((((unsigned int) &(((struct s5pc210_gpio_part2 *) \
-				S5PC210_GPIO_PART2_BASE)->bank)) \
-	    - S5PC210_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
+#define exynos4210_gpio_part2_get_nr(bank, pin) \
+	(((((((unsigned int) &(((struct exynos4210_gpio_part2 *) \
+				EXYNOS4210_GPIO_PART2_BASE)->bank)) \
+	    - EXYNOS4210_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
 	  * GPIO_PER_BANK) + pin) + GPIO_PART1_MAX)
 
 static inline unsigned int s5p_gpio_base(int nr)
 {
 	if (nr < GPIO_PART1_MAX)
-		return S5PC210_GPIO_PART1_BASE;
+		return EXYNOS4210_GPIO_PART1_BASE;
 	else
-		return S5PC210_GPIO_PART2_BASE;
+		return EXYNOS4210_GPIO_PART2_BASE;
 
 	return 0;
 }
diff --git a/arch/arm/include/asm/arch-s5pc2xx/mmc.h b/arch/arm/include/asm/arch-exynos4/mmc.h
similarity index 100%
rename from arch/arm/include/asm/arch-s5pc2xx/mmc.h
rename to arch/arm/include/asm/arch-exynos4/mmc.h
diff --git a/arch/arm/include/asm/arch-s5pc2xx/pwm.h b/arch/arm/include/asm/arch-exynos4/pwm.h
similarity index 100%
rename from arch/arm/include/asm/arch-s5pc2xx/pwm.h
rename to arch/arm/include/asm/arch-exynos4/pwm.h
diff --git a/arch/arm/include/asm/arch-s5pc2xx/sromc.h b/arch/arm/include/asm/arch-exynos4/sromc.h
similarity index 100%
rename from arch/arm/include/asm/arch-s5pc2xx/sromc.h
rename to arch/arm/include/asm/arch-exynos4/sromc.h
diff --git a/arch/arm/include/asm/arch-s5pc2xx/sys_proto.h b/arch/arm/include/asm/arch-exynos4/sys_proto.h
similarity index 100%
rename from arch/arm/include/asm/arch-s5pc2xx/sys_proto.h
rename to arch/arm/include/asm/arch-exynos4/sys_proto.h
diff --git a/arch/arm/include/asm/arch-s5pc2xx/uart.h b/arch/arm/include/asm/arch-exynos4/uart.h
similarity index 100%
rename from arch/arm/include/asm/arch-s5pc2xx/uart.h
rename to arch/arm/include/asm/arch-exynos4/uart.h
diff --git a/board/samsung/origen/lowlevel_init.S b/board/samsung/origen/lowlevel_init.S
index ddca1e2..a7fb934 100644
--- a/board/samsung/origen/lowlevel_init.S
+++ b/board/samsung/origen/lowlevel_init.S
@@ -1,5 +1,5 @@ 
 /*
- * Lowlevel setup for ORIGEN board based on S5PV310
+ * Lowlevel setup for ORIGEN board based on EXYNOS4210
  *
  * Copyright (C) 2011 Samsung Electronics
  *
@@ -43,11 +43,11 @@  lowlevel_init:
 
 	/* r5 has always zero */
 	mov	r5, #0
-	ldr	r7, =S5PC210_GPIO_PART1_BASE
-	ldr	r6, =S5PC210_GPIO_PART2_BASE
+	ldr	r7, =EXYNOS4210_GPIO_PART1_BASE
+	ldr	r6, =EXYNOS4210_GPIO_PART2_BASE
 
 	/* check reset status */
-	ldr	r0, =(S5PC210_POWER_BASE + INFORM1_OFFSET)
+	ldr	r0, =(EXYNOS4210_POWER_BASE + INFORM1_OFFSET)
 	ldr	r1, [r0]
 
 	/* AFTR wakeup reset */
@@ -97,9 +97,9 @@  wakeup_reset:
 
 exit_wakeup:
 	/* Load return address and jump to kernel */
-	ldr	r0, =(S5PC210_POWER_BASE + INFORM0_OFFSET)
+	ldr	r0, =(EXYNOS4210_POWER_BASE + INFORM0_OFFSET)
 
-	/* r1 = physical address of s5pc210_cpu_resume function */
+	/* r1 = physical address of exynos4210_cpu_resume function */
 	ldr	r1, [r0]
 
 	/* Jump to kernel*/
@@ -113,7 +113,7 @@  exit_wakeup:
  */
 system_clock_init:
 	push	{lr}
-	ldr	r0, =S5PC210_CLOCK_BASE
+	ldr	r0, =EXYNOS4210_CLOCK_BASE
 
 	/* APLL(1), MPLL(1), CORE(0), HPM(0) */
 	ldr	r1, =CLK_SRC_CPU_VAL
@@ -290,13 +290,13 @@  uart_asm_init:
 
 	/* setup UART0-UART3 GPIOs (part1) */
 	mov	r0, r7
-	ldr	r1, =S5PC210_GPIO_A0_CON_VAL
-	str	r1, [r0, #S5PC210_GPIO_A0_CON_OFFSET]
-	ldr	r1, =S5PC210_GPIO_A1_CON_VAL
-	str	r1, [r0, #S5PC210_GPIO_A1_CON_OFFSET]
+	ldr	r1, =EXYNOS4210_GPIO_A0_CON_VAL
+	str	r1, [r0, #EXYNOS4210_GPIO_A0_CON_OFFSET]
+	ldr	r1, =EXYNOS4210_GPIO_A1_CON_VAL
+	str	r1, [r0, #EXYNOS4210_GPIO_A1_CON_OFFSET]
 
-	ldr r0, =S5PC210_UART_BASE
-	add r0, r0, #S5PC210_DEFAULT_UART_OFFSET
+	ldr r0, =EXYNOS4210_UART_BASE
+	add r0, r0, #EXYNOS4210_DEFAULT_UART_OFFSET
 
 	ldr	r1, =ULCON_VAL
 	str	r1, [r0, #ULCON_OFFSET]
diff --git a/board/samsung/origen/mem_setup.S b/board/samsung/origen/mem_setup.S
index a798848..6a41046 100644
--- a/board/samsung/origen/mem_setup.S
+++ b/board/samsung/origen/mem_setup.S
@@ -1,5 +1,5 @@ 
 /*
- * Memory setup for ORIGEN board based on S5PV310
+ * Memory setup for ORIGEN board based on EXYNOS4210
  *
  * Copyright (C) 2011 Samsung Electronics
  *
@@ -38,7 +38,7 @@  mem_ctrl_asm_init:
 	str r1, [r0]
 
 #ifdef SET_MIU
-	ldr	r0, =S5PC210_MIU_BASE
+	ldr	r0, =EXYNOS4210_MIU_BASE
 	/* Interleave: 2Bit, Interleave_bit1: 0x21, Interleave_bit2: 0x7 */
 	ldr	r1, =0x20001507
 	str	r1, [r0, #APB_SFR_INTERLEAVE_CONF_OFFSET]
@@ -48,7 +48,7 @@  mem_ctrl_asm_init:
 	str	r1, [r0, #APB_SFR_ARBRITATION_CONF_OFFSET]
 #endif
 	/* DREX0 */
-	ldr	r0, =S5PC210_DMC0_BASE
+	ldr	r0, =EXYNOS4210_DMC0_BASE
 
 	/*
 	 * DLL Parameter Setting:
@@ -229,7 +229,7 @@  mem_ctrl_asm_init:
 	bne	8b
 
 	/* DREX1 */
-	ldr	r0, =S5PC210_DMC1_BASE	@0x10410000
+	ldr	r0, =EXYNOS4210_DMC1_BASE	@0x10410000
 
 	/*
 	 * DLL Parameter Setting:
@@ -410,11 +410,11 @@  mem_ctrl_asm_init:
 	bne	8b
 
 	/* turn on DREX0, DREX1 */
-	ldr	r0, =S5PC210_DMC0_BASE
+	ldr	r0, =EXYNOS4210_DMC0_BASE
 	ldr	r1, =0x0FFF303a
 	str	r1, [r0, #DMC_CONCONTROL]
 
-	ldr	r0, =S5PC210_DMC1_BASE
+	ldr	r0, =EXYNOS4210_DMC1_BASE
 	ldr	r1, =0x0FFF303a
 	str	r1, [r0, #DMC_CONCONTROL]
 
diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
index 8882646..14cbb9b 100644
--- a/board/samsung/origen/origen.c
+++ b/board/samsung/origen/origen.c
@@ -27,13 +27,13 @@ 
 #include <asm/arch/mmc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
-struct s5pc210_gpio_part1 *gpio1;
-struct s5pc210_gpio_part2 *gpio2;
+struct exynos4210_gpio_part1 *gpio1;
+struct exynos4210_gpio_part2 *gpio2;
 
 int board_init(void)
 {
-	gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE;
-	gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE;
+	gpio1 = (struct exynos4210_gpio_part1 *) EXYNOS4210_GPIO_PART1_BASE;
+	gpio2 = (struct exynos4210_gpio_part2 *) EXYNOS4210_GPIO_PART2_BASE;
 
 	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
 	return 0;
diff --git a/board/samsung/origen/origen_setup.h b/board/samsung/origen/origen_setup.h
index 63d85d8..fa9146f 100644
--- a/board/samsung/origen/origen_setup.h
+++ b/board/samsung/origen/origen_setup.h
@@ -98,8 +98,8 @@ 
 #define INFORM1_OFFSET			0x804
 
 /* GPIO Offsets for UART: GPIO Contol Register */
-#define S5PC210_GPIO_A0_CON_OFFSET	0x00
-#define S5PC210_GPIO_A1_CON_OFFSET	0x20
+#define EXYNOS4210_GPIO_A0_CON_OFFSET	0x00
+#define EXYNOS4210_GPIO_A1_CON_OFFSET	0x20
 
 /* UART Register offsets */
 #define ULCON_OFFSET		0x00
@@ -416,8 +416,8 @@ 
  * UART GPIO_A0/GPIO_A1 Control Register Value
  * 0x2: UART Function
  */
-#define S5PC210_GPIO_A0_CON_VAL	0x22222222
-#define S5PC210_GPIO_A1_CON_VAL	0x222222
+#define EXYNOS4210_GPIO_A0_CON_VAL	0x22222222
+#define EXYNOS4210_GPIO_A1_CON_VAL	0x222222
 
 /* ULCON: UART Line Control Value 8N1 */
 #define WORD_LEN_5_BIT		0x00
diff --git a/board/samsung/smdkv310/lowlevel_init.S b/board/samsung/smdkv310/lowlevel_init.S
index 58b737b..10f1b89 100644
--- a/board/samsung/smdkv310/lowlevel_init.S
+++ b/board/samsung/smdkv310/lowlevel_init.S
@@ -1,5 +1,5 @@ 
 /*
- * Lowlevel setup for SMDKV310 board based on S5PC210
+ * Lowlevel setup for SMDKV310 board based on EXYNOS4210
  *
  * Copyright (C) 2011 Samsung Electronics
  *
@@ -45,11 +45,11 @@  lowlevel_init:
 
 	/* r5 has always zero */
 	mov	r5, #0
-	ldr	r7, =S5PC210_GPIO_PART1_BASE
-	ldr	r6, =S5PC210_GPIO_PART2_BASE
+	ldr	r7, =EXYNOS4210_GPIO_PART1_BASE
+	ldr	r6, =EXYNOS4210_GPIO_PART2_BASE
 
 	/* check reset status  */
-	ldr     r0, =(S5PC210_POWER_BASE + 0x81C)	@ INFORM7
+	ldr     r0, =(EXYNOS4210_POWER_BASE + 0x81C)	@ INFORM7
 	ldr     r1, [r0]
 
 	/* AFTR wakeup reset */
@@ -95,9 +95,9 @@  wakeup_reset:
 
 exit_wakeup:
 	/* Load return address and jump to kernel */
-	ldr     r0, =(S5PC210_POWER_BASE + 0x800)	@ INFORM0
+	ldr     r0, =(EXYNOS4210_POWER_BASE + 0x800)	@ INFORM0
 
-	/* r1 = physical address of s5pc210_cpu_resume function */
+	/* r1 = physical address of exynos4210_cpu_resume function */
 	ldr	r1, [r0]
 
 	/* Jump to kernel*/
@@ -111,7 +111,7 @@  exit_wakeup:
  */
 system_clock_init:
 	push	{lr}
-	ldr	r0, =S5PC210_CLOCK_BASE
+	ldr	r0, =EXYNOS4210_CLOCK_BASE
 
 	/* APLL(1), MPLL(1), CORE(0), HPM(0) */
 	ldr	r1, =0x0101
@@ -388,12 +388,12 @@  uart_asm_init:
 	/* setup UART0-UART3 GPIOs (part1) */
 	mov	r0, r7
 	ldr	r1, =0x22222222
-	str	r1, [r0, #0x00]			@ S5PC210_GPIO_A0_OFFSET
+	str	r1, [r0, #0x00]			@ EXYNOS4210_GPIO_A0_OFFSET
 	ldr	r1, =0x00222222
-	str	r1, [r0, #0x20]			@ S5PC210_GPIO_A1_OFFSET
+	str	r1, [r0, #0x20]			@ EXYNOS4210_GPIO_A1_OFFSET
 
-	ldr r0, =S5PC210_UART_BASE
-	add r0, r0, #S5PC210_DEFAULT_UART_OFFSET
+	ldr r0, =EXYNOS4210_UART_BASE
+	add r0, r0, #EXYNOS4210_DEFAULT_UART_OFFSET
 
 	ldr r1, =0x3C5
 	str	r1, [r0, #0x4]
diff --git a/board/samsung/smdkv310/mem_setup.S b/board/samsung/smdkv310/mem_setup.S
index 73aebe3..df62f5f 100644
--- a/board/samsung/smdkv310/mem_setup.S
+++ b/board/samsung/smdkv310/mem_setup.S
@@ -1,5 +1,5 @@ 
 /*
- * Memory setup for SMDKV310 board based on S5PC210
+ * Memory setup for SMDKV310 board based on EXYNOS4210
  *
  * Copyright (C) 2011 Samsung Electronics
  *
@@ -54,7 +54,7 @@  mem_ctrl_asm_init:
 	str r1, [r0]
 
 #ifdef SET_MIU
-	ldr	r0, =S5PC210_MIU_BASE	@0x10600000
+	ldr	r0, =EXYNOS4210_MIU_BASE	@0x10600000
 #ifdef CONFIG_MIU_1BIT_INTERLEAVED
 	ldr	r1, =0x0000000c
 	str	r1, [r0, #0x400]	@MIU_INTLV_CONFIG
@@ -89,7 +89,7 @@  mem_ctrl_asm_init:
 #endif
 #endif
 	/* DREX0 */
-	ldr	r0, =S5PC210_DMC0_BASE	@0x10400000
+	ldr	r0, =EXYNOS4210_DMC0_BASE	@0x10400000
 
 	ldr	r1, =0xe0000086
 	str	r1, [r0, #0x1C]		@DMC_PHYCONTROL1
@@ -221,7 +221,7 @@  mem_ctrl_asm_init:
 	bne	8b
 
 	/* DREX1 */
-	ldr	r0, =S5PC210_DMC1_BASE	@0x10410000
+	ldr	r0, =EXYNOS4210_DMC1_BASE	@0x10410000
 
 	ldr	r1, =0xe0000086
 	str	r1, [r0, #0x1C]		@DMC_PHYCONTROL1
diff --git a/board/samsung/smdkv310/smdkv310.c b/board/samsung/smdkv310/smdkv310.c
index d9caca7..44cd549 100644
--- a/board/samsung/smdkv310/smdkv310.c
+++ b/board/samsung/smdkv310/smdkv310.c
@@ -29,8 +29,8 @@ 
 #include <asm/arch/sromc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
-struct s5pc210_gpio_part1 *gpio1;
-struct s5pc210_gpio_part2 *gpio2;
+struct exynos4210_gpio_part1 *gpio1;
+struct exynos4210_gpio_part2 *gpio2;
 
 static void smc9115_pre_init(void)
 {
@@ -52,8 +52,8 @@  static void smc9115_pre_init(void)
 
 int board_init(void)
 {
-	gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE;
-	gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE;
+	gpio1 = (struct exynos4210_gpio_part1 *) EXYNOS4210_GPIO_PART1_BASE;
+	gpio2 = (struct exynos4210_gpio_part2 *) EXYNOS4210_GPIO_PART2_BASE;
 
 	smc9115_pre_init();
 
diff --git a/board/samsung/universal_c210/lowlevel_init.S b/board/samsung/universal_c210/lowlevel_init.S
index 67635bb..76bbba5 100644
--- a/board/samsung/universal_c210/lowlevel_init.S
+++ b/board/samsung/universal_c210/lowlevel_init.S
@@ -1,5 +1,5 @@ 
 /*
- * Lowlevel setup for universal board based on S5PC210
+ * Lowlevel setup for universal board based on EXYNOS4210
  *
  * Copyright (C) 2010 Samsung Electronics
  * Kyungmin Park <kyungmin.park@samsung.com>
@@ -43,11 +43,11 @@  lowlevel_init:
 	/* r5 has always zero */
 	mov	r5, #0
 
-	ldr	r7, =S5PC210_GPIO_PART1_BASE
-	ldr	r6, =S5PC210_GPIO_PART2_BASE
+	ldr	r7, =EXYNOS4210_GPIO_PART1_BASE
+	ldr	r6, =EXYNOS4210_GPIO_PART2_BASE
 
 	/* System Timer */
-	ldr	r0, =S5PC210_SYSTIMER_BASE
+	ldr	r0, =EXYNOS4210_SYSTIMER_BASE
 	ldr	r1, =0x5000
 	str	r1, [r0, #0x0]
 	ldr	r1, =0xffffffff
@@ -57,7 +57,7 @@  lowlevel_init:
 
 	/* PMIC manual reset */
 	/* nPOWER: XEINT_23: GPX2[7] */
-	add	r0, r6, #0xC40			@ S5PC210_GPIO_X2_OFFSET
+	add	r0, r6, #0xC40			@ EXYNOS4210_GPIO_X2_OFFSET
 	ldr	r1, [r0, #0x0]
 	bic	r1, r1, #(0xf << 28)		@ 28 = 7 * 4-bit
 	orr	r1, r1, #(0x1 << 28)		@ Output
@@ -71,7 +71,7 @@  lowlevel_init:
 	bl	system_clock_init
 
 	/* Disable Watchdog */
-	ldr	r0, =S5PC210_WATCHDOG_BASE		@0x10060000
+	ldr	r0, =EXYNOS4210_WATCHDOG_BASE		@0x10060000
 	str	r5, [r0]
 
 	/* UART */
@@ -99,12 +99,12 @@  uart_asm_init:
 	 */
 	mov	r0, r7
 	ldr	r1, =0x22222222
-	str	r1, [r0, #0x00]			@ S5PC210_GPIO_A0_OFFSET
+	str	r1, [r0, #0x00]			@ EXYNOS4210_GPIO_A0_OFFSET
 	ldr	r1, =0x00223322
-	str	r1, [r0, #0x20]			@ S5PC210_GPIO_A1_OFFSET
+	str	r1, [r0, #0x20]			@ EXYNOS4210_GPIO_A1_OFFSET
 
-	/* UART_SEL GPY4[7] (part2) at S5PC210 */
-	add	r0, r6, #0x1A0			@ S5PC210_GPIO_Y4_OFFSET
+	/* UART_SEL GPY4[7] (part2) at EXYNOS4210 */
+	add	r0, r6, #0x1A0			@ EXYNOS4210_GPIO_Y4_OFFSET
 	ldr	r1, [r0, #0x0]
 	bic	r1, r1, #(0xf << 28)		@ 28 = 7 * 4-bit
 	orr	r1, r1, #(0x1 << 28)
@@ -125,7 +125,7 @@  uart_asm_init:
 	nop
 
 system_clock_init:
-	ldr	r0, =S5PC210_CLOCK_BASE
+	ldr	r0, =EXYNOS4210_CLOCK_BASE
 
 	/* APLL(1), MPLL(1), CORE(0), HPM(0) */
 	ldr	r1, =0x0101
@@ -326,7 +326,7 @@  system_clock_init:
 	nop
 
 system_power_init:
-	ldr	r0, =S5PC210_POWER_BASE		@ 0x10020000
+	ldr	r0, =EXYNOS4210_POWER_BASE		@ 0x10020000
 
 	ldr	r2, =0x330C			@ PS_HOLD_CONTROL
 	ldr	r1, [r0, r2]
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index d767eaa..0542a16 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -31,8 +31,8 @@ 
 
 DECLARE_GLOBAL_DATA_PTR;
 
-struct s5pc210_gpio_part1 *gpio1;
-struct s5pc210_gpio_part2 *gpio2;
+struct exynos4210_gpio_part1 *gpio1;
+struct exynos4210_gpio_part2 *gpio2;
 unsigned int board_rev;
 
 u32 get_board_rev(void)
@@ -49,8 +49,8 @@  static void check_hw_revision(void);
 
 int board_init(void)
 {
-	gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE;
-	gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE;
+	gpio1 = (struct exynos4210_gpio_part1 *) EXYNOS4210_GPIO_PART1_BASE;
+	gpio2 = (struct exynos4210_gpio_part2 *) EXYNOS4210_GPIO_PART2_BASE;
 
 	gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
diff --git a/boards.cfg b/boards.cfg
index 7c63449..98b1b3c 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -201,9 +201,9 @@  omap4_sdp4430                arm         armv7       sdp4430             ti
 omap5_evm                    arm         armv7       omap5_evm           ti		omap5
 s5p_goni                     arm         armv7       goni                samsung        s5pc1xx
 smdkc100                     arm         armv7       smdkc100            samsung        s5pc1xx
-origen			     arm	 armv7	     origen		 samsung	s5pc2xx
-s5pc210_universal            arm         armv7       universal_c210      samsung        s5pc2xx
-smdkv310		     arm	 armv7	     smdkv310		 samsung	s5pc2xx
+origen			     arm	 armv7	     origen		 samsung	exynos4
+s5pc210_universal            arm         armv7       universal_c210      samsung        exynos4
+smdkv310		     arm	 armv7	     smdkv310		 samsung	exynos4
 harmony                      arm         armv7       harmony             nvidia         tegra2
 seaboard                     arm         armv7       seaboard            nvidia         tegra2
 u8500_href                   arm         armv7       u8500               st-ericsson    u8500
diff --git a/include/configs/origen.h b/include/configs/origen.h
index 380ef4f..6099e87 100644
--- a/include/configs/origen.h
+++ b/include/configs/origen.h
@@ -1,7 +1,7 @@ 
 /*
  * Copyright (C) 2011 Samsung Electronics
  *
- * Configuration settings for the SAMSUNG ORIGEN (S5PV310) board.
+ * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -28,7 +28,7 @@ 
 /* High Level Configuration Options */
 #define CONFIG_SAMSUNG			1	/* SAMSUNG core */
 #define CONFIG_S5P			1	/* S5P Family */
-#define CONFIG_S5PC210			1	/* which is in a S5PC210 SoC */
+#define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
 #define CONFIG_ORIGEN			1	/* working with ORIGEN*/
 
 #include <asm/arch/cpu.h>		/* get chip and board defs */
@@ -68,7 +68,7 @@ 
 #define CONFIG_SERIAL_MULTI		1
 #define CONFIG_SERIAL2			1	/* use SERIAL 2 */
 #define CONFIG_BAUDRATE			115200
-#define S5PC210_DEFAULT_UART_OFFSET	0x020000
+#define EXYNOS4210_DEFAULT_UART_OFFSET	0x020000
 
 /* SD/MMC configuration */
 #define CONFIG_GENERIC_MMC		1
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index cc14f97..0e390bd 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -2,7 +2,7 @@ 
  * Copyright (C) 2010 Samsung Electronics
  * Minkyu Kang <mk7.kang@samsung.com>
  *
- * Configuation settings for the SAMSUNG Universal (s5pc100) board.
+ * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -32,7 +32,7 @@ 
  */
 #define CONFIG_SAMSUNG		1	/* in a SAMSUNG core */
 #define CONFIG_S5P		1	/* which is in a S5P Family */
-#define CONFIG_S5PC210		1	/* which is in a S5PC210 */
+#define CONFIG_EXYNOS4210	1	/* which is in a EXYNOS4210 */
 #define CONFIG_UNIVERSAL	1	/* working with Universal */
 
 #include <asm/arch/cpu.h>		/* get chip and board defs */
@@ -47,7 +47,7 @@ 
 #define CONFIG_SYS_SDRAM_BASE		0x40000000
 #define CONFIG_SYS_TEXT_BASE		0x44800000
 
-/* input clock of PLL: Universal has 24MHz input clock at S5PC210 */
+/* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */
 #define CONFIG_SYS_CLK_FREQ_C210	24000000
 
 #define CONFIG_SETUP_MEMORY_TAGS
@@ -249,8 +249,8 @@ 
 /*
  * I2C Settings
  */
-#define CONFIG_SOFT_I2C_GPIO_SCL s5pc210_gpio_part1_get_nr(b, 7)
-#define CONFIG_SOFT_I2C_GPIO_SDA s5pc210_gpio_part1_get_nr(b, 6)
+#define CONFIG_SOFT_I2C_GPIO_SCL exynos4210_gpio_part1_get_nr(b, 7)
+#define CONFIG_SOFT_I2C_GPIO_SDA exynos4210_gpio_part1_get_nr(b, 6)
 
 #define CONFIG_SOFT_I2C
 #define CONFIG_SOFT_I2C_READ_REPEATED_START
diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
index fc8bb06..f81e4d7 100644
--- a/include/configs/smdkv310.h
+++ b/include/configs/smdkv310.h
@@ -1,7 +1,7 @@ 
 /*
  * Copyright (C) 2011 Samsung Electronics
  *
- * Configuration settings for the SAMSUNG SMDKV310 (S5PC210) board.
+ * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -28,7 +28,7 @@ 
 /* High Level Configuration Options */
 #define CONFIG_SAMSUNG			1	/* in a SAMSUNG core */
 #define CONFIG_S5P			1	/* S5P Family */
-#define CONFIG_S5PC210			1	/* which is in a S5PC210 SoC */
+#define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
 #define CONFIG_SMDKV310			1	/* working with SMDKV310*/
 
 #include <asm/arch/cpu.h>		/* get chip and board defs */
@@ -65,7 +65,7 @@ 
 #define CONFIG_SERIAL_MULTI		1
 #define CONFIG_SERIAL1			1	/* use SERIAL 1 */
 #define CONFIG_BAUDRATE			115200
-#define S5PC210_DEFAULT_UART_OFFSET	0x010000
+#define EXYNOS4210_DEFAULT_UART_OFFSET	0x010000
 
 /* SD/MMC configuration */
 #define CONFIG_GENERIC_MMC		1