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[209.85.217.179]) by mx.google.com with ESMTPS id sb1si7880097lbb.33.2015.09.18.16.42.22 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 Sep 2015 16:42:22 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.179 as permitted sender) client-ip=209.85.217.179; Received: by lbcao8 with SMTP id ao8so31999562lbc.3 for ; Fri, 18 Sep 2015 16:42:22 -0700 (PDT) X-Received: by 10.152.21.196 with SMTP id x4mr4189862lae.86.1442619742383; Fri, 18 Sep 2015 16:42:22 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp566537lbq; Fri, 18 Sep 2015 16:42:21 -0700 (PDT) X-Received: by 10.68.130.71 with SMTP id oc7mr9969826pbb.29.1442619741065; Fri, 18 Sep 2015 16:42:21 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id kt9si17271686pab.169.2015.09.18.16.42.20; Fri, 18 Sep 2015 16:42:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754449AbbIRXmT (ORCPT + 30 others); Fri, 18 Sep 2015 19:42:19 -0400 Received: from mail-qg0-f46.google.com ([209.85.192.46]:34604 "EHLO mail-qg0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752217AbbIRXmR (ORCPT ); Fri, 18 Sep 2015 19:42:17 -0400 Received: by qgez77 with SMTP id z77so51671600qge.1 for ; Fri, 18 Sep 2015 16:42:17 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.140.93.53 with SMTP id c50mr9477329qge.59.1442619736868; Fri, 18 Sep 2015 16:42:16 -0700 (PDT) Received: by 10.55.3.21 with HTTP; Fri, 18 Sep 2015 16:42:16 -0700 (PDT) In-Reply-To: <20150826012735.8851.49787.stgit@dwillia2-desk3.amr.corp.intel.com> References: <20150826010220.8851.18077.stgit@dwillia2-desk3.amr.corp.intel.com> <20150826012735.8851.49787.stgit@dwillia2-desk3.amr.corp.intel.com> Date: Fri, 18 Sep 2015 16:42:16 -0700 Message-ID: Subject: Re: [PATCH v2 2/9] mm: move __phys_to_pfn and __pfn_to_phys to asm/generic/memory_model.h From: Tyler Baker To: Dan Williams Cc: linux-nvdimm@lists.01.org, boaz@plexistor.com, david@fromorbit.com, "linux-kernel@vger.kernel.org" , hch@lst.de, linux-mm@kvack.org, hpa@zytor.com, ross.zwisler@linux.intel.com, Ingo Molnar , "Kevin's boot bot" Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: tyler.baker@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.179 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Hi, On 25 August 2015 at 18:27, Dan Williams wrote: > From: Christoph Hellwig > > Three architectures already define these, and we'll need them genericly > soon. > > Signed-off-by: Christoph Hellwig > Signed-off-by: Dan Williams > --- > arch/arm/include/asm/memory.h | 6 ------ > arch/arm64/include/asm/memory.h | 6 ------ > arch/unicore32/include/asm/memory.h | 6 ------ > include/asm-generic/memory_model.h | 6 ++++++ > 4 files changed, 6 insertions(+), 18 deletions(-) > > diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h > index b7f6fb462ea0..98d58bb04ac5 100644 > --- a/arch/arm/include/asm/memory.h > +++ b/arch/arm/include/asm/memory.h > @@ -119,12 +119,6 @@ > #endif > > /* > - * Convert a physical address to a Page Frame Number and back > - */ > -#define __phys_to_pfn(paddr) ((unsigned long)((paddr) >> PAGE_SHIFT)) > -#define __pfn_to_phys(pfn) ((phys_addr_t)(pfn) << PAGE_SHIFT) > - > -/* > * Convert a page to/from a physical address > */ > #define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page))) > diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h > index f800d45ea226..d808bb688751 100644 > --- a/arch/arm64/include/asm/memory.h > +++ b/arch/arm64/include/asm/memory.h > @@ -81,12 +81,6 @@ > #define __phys_to_virt(x) ((unsigned long)((x) - PHYS_OFFSET + PAGE_OFFSET)) > > /* > - * Convert a physical address to a Page Frame Number and back > - */ > -#define __phys_to_pfn(paddr) ((unsigned long)((paddr) >> PAGE_SHIFT)) > -#define __pfn_to_phys(pfn) ((phys_addr_t)(pfn) << PAGE_SHIFT) > - > -/* > * Convert a page to/from a physical address > */ > #define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page))) > diff --git a/arch/unicore32/include/asm/memory.h b/arch/unicore32/include/asm/memory.h > index debafc40200a..3bb0a29fd2d7 100644 > --- a/arch/unicore32/include/asm/memory.h > +++ b/arch/unicore32/include/asm/memory.h > @@ -61,12 +61,6 @@ > #endif > > /* > - * Convert a physical address to a Page Frame Number and back > - */ > -#define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT) > -#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT) > - > -/* > * Convert a page to/from a physical address > */ > #define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page))) > diff --git a/include/asm-generic/memory_model.h b/include/asm-generic/memory_model.h > index 14909b0b9cae..f20f407ce45d 100644 > --- a/include/asm-generic/memory_model.h > +++ b/include/asm-generic/memory_model.h > @@ -69,6 +69,12 @@ > }) > #endif /* CONFIG_FLATMEM/DISCONTIGMEM/SPARSEMEM */ > > +/* > + * Convert a physical address to a Page Frame Number and back > + */ > +#define __phys_to_pfn(paddr) ((unsigned long)((paddr) >> PAGE_SHIFT)) > +#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT) The kernelci.org bot has been reporting complete boot failures[1] on ARM platforms with more than 4GB of memory and LPAE enabled. I've bisected[2] the failures down to this commit, and reverting it on top of the latest mainline resolves the boot issue. I took a closer look at this patch and noticed the cast to phys_addr_t was dropped in the generic function. Adding this to the new generic function solves the boot issue I'm reporting. If this fix is valid, I can send a formal patch or it can be squashed into the original commit. Cheers, Tyler [1] http://kernelci.org/boot/?d01&LPAE [2] http://hastebin.com/tuhefudage.vhdl --- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ diff --git a/include/asm-generic/memory_model.h b/include/asm-generic/memory_model.h index f20f407..db9f5c7 100644 --- a/include/asm-generic/memory_model.h +++ b/include/asm-generic/memory_model.h @@ -73,7 +73,7 @@ * Convert a physical address to a Page Frame Number and back */ #define __phys_to_pfn(paddr) ((unsigned long)((paddr) >> PAGE_SHIFT)) -#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT) +#define __pfn_to_phys(pfn) ((phys_addr_t)(pfn) << PAGE_SHIFT) #define page_to_pfn __page_to_pfn #define pfn_to_page __pfn_to_page