diff mbox

[04/10] ARM: dts: enable clock support for BCM5301X

Message ID 1443826665-17570-5-git-send-email-jonmason@broadcom.com
State New
Headers show

Commit Message

Jon Mason Oct. 2, 2015, 10:57 p.m. UTC
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar SoCs.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
 arch/arm/boot/dts/bcm5301x.dtsi | 67 ++++++++++++++++++++++++++++++++++++-----
 1 file changed, 60 insertions(+), 7 deletions(-)

Comments

Stephen Boyd Oct. 9, 2015, 7:35 a.m. UTC | #1
On 10/02, Jon Mason wrote:
> Replace current device tree dummy clocks with real clock support for
> Broadcom Northstar SoCs.
> 
> Signed-off-by: Jon Mason <jonmason@broadcom.com>
> ---

I'd rather not take any dts changes through clk tree.

>  arch/arm/boot/dts/bcm5301x.dtsi | 67 ++++++++++++++++++++++++++++++++++++-----
>  1 file changed, 60 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
> index 6f50f67..f717859 100644
> --- a/arch/arm/boot/dts/bcm5301x.dtsi
> +++ b/arch/arm/boot/dts/bcm5301x.dtsi
> @@ -55,14 +56,14 @@
>  			compatible = "arm,cortex-a9-global-timer";
>  			reg = <0x0200 0x100>;
>  			interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&clk_periph>;
> +			clocks = <&periph_clk>;
>  		};
>  
>  		local-timer@0600 {
>  			compatible = "arm,cortex-a9-twd-timer";
>  			reg = <0x0600 0x100>;
>  			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&clk_periph>;
> +			clocks = <&periph_clk>;
>  		};
>  
>  		gic: interrupt-controller@1000 {
> @@ -94,14 +95,66 @@
>  
>  	clocks {

I'd expect this to only contain nodes that don't have a reg
property. Clock providers that have a reg property would go into
some soc node or bus. Perhaps that's the chipcommonA node, or
axi?

>  		#address-cells = <1>;
> -		#size-cells = <0>;
> +		#size-cells = <1>;
> +		ranges;
>  
> -		/* As long as we do not have a real clock driver us this
> -		 * fixed clock */
> -		clk_periph: periph {
> +		osc: oscillator {
> +			#clock-cells = <0>;
>  			compatible = "fixed-clock";
> +			clock-frequency = <25000000>;
> +		};
> +
> +		lcpll0: lcpll0@1800c100 {
> +			#clock-cells = <1>;
> +			compatible = "brcm,nsp-lcpll0";
> +			reg = <0x1800c100 0x14>;
> +			clocks = <&osc>;
> +			clock-output-names = "lcpll0", "pcie_phy", "sdio",
> +					     "ddr_phy";
> +		};
> +
> +		genpll: genpll@1800c140 {
> +			#clock-cells = <1>;
> +			compatible = "brcm,nsp-genpll";
> +			reg = <0x1800c140 0x24>;
> +			clocks = <&osc>;
> +			clock-output-names = "genpll", "phy", "ethernetclk",
> +					     "usbclk", "iprocfast", "sata1",
> +					     "sata2";
> +		};
> +
> +		iprocmed: iprocmed {
> +			#clock-cells = <0>;
> +			compatible = "fixed-factor-clock";
> +			clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
> +			clock-div = <2>;
> +			clock-mult = <1>;
> +			clock-output-names = "iprocmed";
> +		};
> +
> +		iprocslow: iprocslow {
> +			#clock-cells = <0>;
> +			compatible = "fixed-factor-clock";
> +			clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
> +			clock-div = <4>;
> +			clock-mult = <1>;
> +			clock-output-names = "iprocslow";
> +		};
> +
> +
> +		a9pll: arm_clk@19000000 {
> +			#clock-cells = <0>;
> +			compatible = "brcm,nsp-armpll";
> +			clocks = <&osc>;
> +			reg = <0x19000000 0x1000>;
> +		};
> +
> +		periph_clk: periph_clk {
>  			#clock-cells = <0>;
> -			clock-frequency = <400000000>;
> +			compatible = "fixed-factor-clock";
> +			clocks = <&a9pll>;
> +			clock-div = <2>;
> +			clock-mult = <1>;
>  		};
>  	};
>  

We're trying to move away from putting individual clocks into DT
like this. Is there some sort of clock controller that's at
0x1800c000, but we're just not exposing all the clocks in there?
See this thread for more information on why we'd like to avoid
this sort of design:

http://lkml.kernel.org/r/<20150416192014.19585.9663@quantum>
Jon Mason Oct. 9, 2015, 6:27 p.m. UTC | #2
On Fri, Oct 09, 2015 at 12:35:40AM -0700, Stephen Boyd wrote:
> On 10/02, Jon Mason wrote:
> > Replace current device tree dummy clocks with real clock support for
> > Broadcom Northstar SoCs.
> > 
> > Signed-off-by: Jon Mason <jonmason@broadcom.com>
> > ---
> 
> I'd rather not take any dts changes through clk tree.

Ok, I'll split off the device tree portion of this patch series, and
submit that after the clk driver portion has been accepted and pushed
upstream.

> 
> >  arch/arm/boot/dts/bcm5301x.dtsi | 67 ++++++++++++++++++++++++++++++++++++-----
> >  1 file changed, 60 insertions(+), 7 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
> > index 6f50f67..f717859 100644
> > --- a/arch/arm/boot/dts/bcm5301x.dtsi
> > +++ b/arch/arm/boot/dts/bcm5301x.dtsi
> > @@ -55,14 +56,14 @@
> >  			compatible = "arm,cortex-a9-global-timer";
> >  			reg = <0x0200 0x100>;
> >  			interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
> > -			clocks = <&clk_periph>;
> > +			clocks = <&periph_clk>;
> >  		};
> >  
> >  		local-timer@0600 {
> >  			compatible = "arm,cortex-a9-twd-timer";
> >  			reg = <0x0600 0x100>;
> >  			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> > -			clocks = <&clk_periph>;
> > +			clocks = <&periph_clk>;
> >  		};
> >  
> >  		gic: interrupt-controller@1000 {
> > @@ -94,14 +95,66 @@
> >  
> >  	clocks {
> 
> I'd expect this to only contain nodes that don't have a reg
> property. Clock providers that have a reg property would go into
> some soc node or bus. Perhaps that's the chipcommonA node, or
> axi?

This might get a little ugly, as some of the clocks are in the
0x18000000 and others are in 0x19000000.  I would think it better to
have them all in one place (as that is more readable).  Do you preferr
I split the pieces up into their respective DT nodes?

> 
> >  		#address-cells = <1>;
> > -		#size-cells = <0>;
> > +		#size-cells = <1>;
> > +		ranges;
> >  
> > -		/* As long as we do not have a real clock driver us this
> > -		 * fixed clock */
> > -		clk_periph: periph {
> > +		osc: oscillator {
> > +			#clock-cells = <0>;
> >  			compatible = "fixed-clock";
> > +			clock-frequency = <25000000>;
> > +		};
> > +
> > +		lcpll0: lcpll0@1800c100 {
> > +			#clock-cells = <1>;
> > +			compatible = "brcm,nsp-lcpll0";
> > +			reg = <0x1800c100 0x14>;
> > +			clocks = <&osc>;
> > +			clock-output-names = "lcpll0", "pcie_phy", "sdio",
> > +					     "ddr_phy";
> > +		};
> > +
> > +		genpll: genpll@1800c140 {
> > +			#clock-cells = <1>;
> > +			compatible = "brcm,nsp-genpll";
> > +			reg = <0x1800c140 0x24>;
> > +			clocks = <&osc>;
> > +			clock-output-names = "genpll", "phy", "ethernetclk",
> > +					     "usbclk", "iprocfast", "sata1",
> > +					     "sata2";
> > +		};
> > +
> > +		iprocmed: iprocmed {
> > +			#clock-cells = <0>;
> > +			compatible = "fixed-factor-clock";
> > +			clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
> > +			clock-div = <2>;
> > +			clock-mult = <1>;
> > +			clock-output-names = "iprocmed";
> > +		};
> > +
> > +		iprocslow: iprocslow {
> > +			#clock-cells = <0>;
> > +			compatible = "fixed-factor-clock";
> > +			clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
> > +			clock-div = <4>;
> > +			clock-mult = <1>;
> > +			clock-output-names = "iprocslow";
> > +		};
> > +
> > +
> > +		a9pll: arm_clk@19000000 {
> > +			#clock-cells = <0>;
> > +			compatible = "brcm,nsp-armpll";
> > +			clocks = <&osc>;
> > +			reg = <0x19000000 0x1000>;
> > +		};
> > +
> > +		periph_clk: periph_clk {
> >  			#clock-cells = <0>;
> > -			clock-frequency = <400000000>;
> > +			compatible = "fixed-factor-clock";
> > +			clocks = <&a9pll>;
> > +			clock-div = <2>;
> > +			clock-mult = <1>;
> >  		};
> >  	};
> >  
> 
> We're trying to move away from putting individual clocks into DT
> like this. Is there some sort of clock controller that's at
> 0x1800c000, but we're just not exposing all the clocks in there?
> See this thread for more information on why we'd like to avoid
> this sort of design:
> 
> http://lkml.kernel.org/r/<20150416192014.19585.9663@quantum>

Okay, I'll clean-up the clock-output-names, per the referenced email.

Thanks,
Jon

> 
> -- 
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
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Stephen Boyd Oct. 10, 2015, 12:14 a.m. UTC | #3
On 10/09, Jon Mason wrote:
> On Fri, Oct 09, 2015 at 12:35:40AM -0700, Stephen Boyd wrote:
> > On 10/02, Jon Mason wrote:
> > 
> > >  arch/arm/boot/dts/bcm5301x.dtsi | 67 ++++++++++++++++++++++++++++++++++++-----
> > >  1 file changed, 60 insertions(+), 7 deletions(-)
> > > 
> > > diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
> > > index 6f50f67..f717859 100644
> > > --- a/arch/arm/boot/dts/bcm5301x.dtsi
> > > +++ b/arch/arm/boot/dts/bcm5301x.dtsi
> > > @@ -55,14 +56,14 @@
> > >  			compatible = "arm,cortex-a9-global-timer";
> > >  			reg = <0x0200 0x100>;
> > >  			interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
> > > -			clocks = <&clk_periph>;
> > > +			clocks = <&periph_clk>;
> > >  		};
> > >  
> > >  		local-timer@0600 {
> > >  			compatible = "arm,cortex-a9-twd-timer";
> > >  			reg = <0x0600 0x100>;
> > >  			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> > > -			clocks = <&clk_periph>;
> > > +			clocks = <&periph_clk>;
> > >  		};
> > >  
> > >  		gic: interrupt-controller@1000 {
> > > @@ -94,14 +95,66 @@
> > >  
> > >  	clocks {
> > 
> > I'd expect this to only contain nodes that don't have a reg
> > property. Clock providers that have a reg property would go into
> > some soc node or bus. Perhaps that's the chipcommonA node, or
> > axi?
> 
> This might get a little ugly, as some of the clocks are in the
> 0x18000000 and others are in 0x19000000.  I would think it better to
> have them all in one place (as that is more readable).  Do you preferr
> I split the pieces up into their respective DT nodes?

Are there two clock controllers? Sorry I don't understand the
architecture here very well. Nodes with reg properties in the
same range should be near each other. We don't group all i2c
controllers into the same node because they're logically i2c
controllers. We express the hierarchy of devices with container
nodes. The clocks node is only useful for board-level clocks, not
things that are inside the SoC.
Jon Mason Oct. 12, 2015, 5:57 p.m. UTC | #4
On Fri, Oct 09, 2015 at 05:14:08PM -0700, Stephen Boyd wrote:
> On 10/09, Jon Mason wrote:
> > On Fri, Oct 09, 2015 at 12:35:40AM -0700, Stephen Boyd wrote:
> > > On 10/02, Jon Mason wrote:
> > > 
> > > >  arch/arm/boot/dts/bcm5301x.dtsi | 67 ++++++++++++++++++++++++++++++++++++-----
> > > >  1 file changed, 60 insertions(+), 7 deletions(-)
> > > > 
> > > > diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
> > > > index 6f50f67..f717859 100644
> > > > --- a/arch/arm/boot/dts/bcm5301x.dtsi
> > > > +++ b/arch/arm/boot/dts/bcm5301x.dtsi
> > > > @@ -55,14 +56,14 @@
> > > >  			compatible = "arm,cortex-a9-global-timer";
> > > >  			reg = <0x0200 0x100>;
> > > >  			interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
> > > > -			clocks = <&clk_periph>;
> > > > +			clocks = <&periph_clk>;
> > > >  		};
> > > >  
> > > >  		local-timer@0600 {
> > > >  			compatible = "arm,cortex-a9-twd-timer";
> > > >  			reg = <0x0600 0x100>;
> > > >  			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> > > > -			clocks = <&clk_periph>;
> > > > +			clocks = <&periph_clk>;
> > > >  		};
> > > >  
> > > >  		gic: interrupt-controller@1000 {
> > > > @@ -94,14 +95,66 @@
> > > >  
> > > >  	clocks {
> > > 
> > > I'd expect this to only contain nodes that don't have a reg
> > > property. Clock providers that have a reg property would go into
> > > some soc node or bus. Perhaps that's the chipcommonA node, or
> > > axi?
> > 
> > This might get a little ugly, as some of the clocks are in the
> > 0x18000000 and others are in 0x19000000.  I would think it better to
> > have them all in one place (as that is more readable).  Do you preferr
> > I split the pieces up into their respective DT nodes?
> 
> Are there two clock controllers? Sorry I don't understand the
> architecture here very well. Nodes with reg properties in the
> same range should be near each other. We don't group all i2c
> controllers into the same node because they're logically i2c
> controllers. We express the hierarchy of devices with container
> nodes. The clocks node is only useful for board-level clocks, not
> things that are inside the SoC.

3 clock sources: a9pll, lcpll, and genpll. The first one resides in
the IP block living at the 0x19000000 address range, while the latter
two live in the 0x18000000 address range.

I'll split up the clocks amongst the respective entries, per your
suggestion.

Thanks,
Jon 




> 
> -- 
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 6f50f67..f717859 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -8,6 +8,7 @@ 
  * Licensed under the GNU/GPL. See COPYING for details.
  */
 
+#include <dt-bindings/clock/bcm-nsp.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
@@ -55,14 +56,14 @@ 
 			compatible = "arm,cortex-a9-global-timer";
 			reg = <0x0200 0x100>;
 			interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk_periph>;
+			clocks = <&periph_clk>;
 		};
 
 		local-timer@0600 {
 			compatible = "arm,cortex-a9-twd-timer";
 			reg = <0x0600 0x100>;
 			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&clk_periph>;
+			clocks = <&periph_clk>;
 		};
 
 		gic: interrupt-controller@1000 {
@@ -94,14 +95,66 @@ 
 
 	clocks {
 		#address-cells = <1>;
-		#size-cells = <0>;
+		#size-cells = <1>;
+		ranges;
 
-		/* As long as we do not have a real clock driver us this
-		 * fixed clock */
-		clk_periph: periph {
+		osc: oscillator {
+			#clock-cells = <0>;
 			compatible = "fixed-clock";
+			clock-frequency = <25000000>;
+		};
+
+		lcpll0: lcpll0@1800c100 {
+			#clock-cells = <1>;
+			compatible = "brcm,nsp-lcpll0";
+			reg = <0x1800c100 0x14>;
+			clocks = <&osc>;
+			clock-output-names = "lcpll0", "pcie_phy", "sdio",
+					     "ddr_phy";
+		};
+
+		genpll: genpll@1800c140 {
+			#clock-cells = <1>;
+			compatible = "brcm,nsp-genpll";
+			reg = <0x1800c140 0x24>;
+			clocks = <&osc>;
+			clock-output-names = "genpll", "phy", "ethernetclk",
+					     "usbclk", "iprocfast", "sata1",
+					     "sata2";
+		};
+
+		iprocmed: iprocmed {
+			#clock-cells = <0>;
+			compatible = "fixed-factor-clock";
+			clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
+			clock-div = <2>;
+			clock-mult = <1>;
+			clock-output-names = "iprocmed";
+		};
+
+		iprocslow: iprocslow {
+			#clock-cells = <0>;
+			compatible = "fixed-factor-clock";
+			clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
+			clock-div = <4>;
+			clock-mult = <1>;
+			clock-output-names = "iprocslow";
+		};
+
+
+		a9pll: arm_clk@19000000 {
+			#clock-cells = <0>;
+			compatible = "brcm,nsp-armpll";
+			clocks = <&osc>;
+			reg = <0x19000000 0x1000>;
+		};
+
+		periph_clk: periph_clk {
 			#clock-cells = <0>;
-			clock-frequency = <400000000>;
+			compatible = "fixed-factor-clock";
+			clocks = <&a9pll>;
+			clock-div = <2>;
+			clock-mult = <1>;
 		};
 	};