| Message ID | 1645804670-21898-3-git-send-email-quic_vpolimer@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/2] arm64/dts/qcom/sc7280: remove assigned-clock-rate property for mdp clk | expand |
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index d550f90..3288f52 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1319,6 +1319,7 @@ static int __maybe_unused dpu_runtime_resume(struct device *dev) struct drm_device *ddev; struct dss_module_power *mp = &dpu_kms->mp; int i; + unsigned long max_freq = ULONG_MAX; ddev = dpu_kms->dev; @@ -1333,6 +1334,8 @@ static int __maybe_unused dpu_runtime_resume(struct device *dev) return rc; } + dev_pm_opp_find_freq_floor(dev, &max_freq); + dev_pm_opp_set_rate(dev, max_freq); dpu_vbif_init_memtypes(dpu_kms); drm_for_each_encoder(encoder, ddev)
use max clock during resume sequence from the opp table. The clock will be scaled down when framework sends an update. Fixes: 62fbdce91("arm64: dts: qcom: sc7280: add display dt nodes") Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +++ 1 file changed, 3 insertions(+)