From patchwork Mon Dec 5 17:35:56 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 5474 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id AB2BE23E0E for ; Mon, 5 Dec 2011 17:36:38 +0000 (UTC) Received: from mail-lpp01m010-f52.google.com (mail-lpp01m010-f52.google.com [209.85.215.52]) by fiordland.canonical.com (Postfix) with ESMTP id 8F14EA182AB for ; Mon, 5 Dec 2011 17:36:38 +0000 (UTC) Received: by mail-lpp01m010-f52.google.com with SMTP id m6so417470lag.11 for ; Mon, 05 Dec 2011 09:36:38 -0800 (PST) Received: by 10.152.145.233 with SMTP id sx9mr6674847lab.6.1323106598483; Mon, 05 Dec 2011 09:36:38 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.41.198 with SMTP id h6cs270348lal; Mon, 5 Dec 2011 09:36:38 -0800 (PST) Received: by 10.14.7.10 with SMTP id 10mr1213677eeo.15.1323106596823; Mon, 05 Dec 2011 09:36:36 -0800 (PST) Received: from eu1sys200aog112.obsmtp.com (eu1sys200aog112.obsmtp.com. [207.126.144.133]) by mx.google.com with SMTP id v41si7387744eef.81.2011.12.05.09.36.32 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 05 Dec 2011 09:36:36 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.133 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) client-ip=207.126.144.133; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.133 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) smtp.mail=ulf.hansson@stericsson.com Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob112.postini.com ([207.126.147.11]) with SMTP ID DSNKTt0BHoyfTRIzfEBKvyiYG73glIF/65tY@postini.com; Mon, 05 Dec 2011 17:36:36 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A0520EF; Mon, 5 Dec 2011 17:36:29 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 690552C41; Mon, 5 Dec 2011 17:36:29 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 6ABFE24C2C0; Mon, 5 Dec 2011 18:36:20 +0100 (CET) Received: from localhost.localdomain (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Mon, 5 Dec 2011 18:36:28 +0100 From: Ulf Hansson To: , Cc: Russell King , Ulf Hansson , Lee Jones Subject: [PATCH 10/14] mmc: mmci: Cache MMCICLOCK and MMCIPOWER register Date: Mon, 5 Dec 2011 18:35:56 +0100 Message-ID: <1323106560-5218-11-git-send-email-ulf.hansson@stericsson.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1323106560-5218-1-git-send-email-ulf.hansson@stericsson.com> References: <1323106560-5218-1-git-send-email-ulf.hansson@stericsson.com> MIME-Version: 1.0 Instead of reading a register value everytime we need to apply a new value for it, maintain a cached copy for it. This also means we are able to skip writes that are not needed. Signed-off-by: Ulf Hansson --- drivers/mmc/host/mmci.c | 41 +++++++++++++++++++++++++++++------------ drivers/mmc/host/mmci.h | 3 ++- 2 files changed, 31 insertions(+), 13 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 4560b20..45e794a 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -121,6 +121,28 @@ static struct variant_data variant_ux500v2 = { /* * This must be called with host->lock held */ +static void mmci_write_clkreg(struct mmci_host *host, u32 clk) +{ + if (host->clk_reg != clk) { + host->clk_reg = clk; + writel(clk, host->base + MMCICLOCK); + } +} + +/* + * This must be called with host->lock held + */ +static void mmci_write_pwrreg(struct mmci_host *host, u32 pwr) +{ + if (host->pwr_reg != pwr) { + host->pwr_reg = pwr; + writel(pwr, host->base + MMCIPOWER); + } +} + +/* + * This must be called with host->lock held + */ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) { struct variant_data *variant = host->variant; @@ -165,7 +187,7 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) clk |= MCI_ST_8BIT_BUS; - writel(clk, host->base + MMCICLOCK); + mmci_write_clkreg(host, clk); } static void @@ -824,14 +846,13 @@ static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int rem */ if (variant->sdio && mmc_card_sdio(host->mmc->card)) { + u32 clk; if (count < 8) - writel(readl(host->base + MMCICLOCK) & - ~variant->clkreg_enable, - host->base + MMCICLOCK); + clk = host->clk_reg & ~variant->clkreg_enable; else - writel(readl(host->base + MMCICLOCK) | - variant->clkreg_enable, - host->base + MMCICLOCK); + clk = host->clk_reg | variant->clkreg_enable; + + mmci_write_clkreg(host, clk); } /* @@ -1090,11 +1111,7 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) spin_lock_irqsave(&host->lock, flags); mmci_set_clkreg(host, ios->clock); - - if (host->pwr != pwr) { - host->pwr = pwr; - writel(pwr, host->base + MMCIPOWER); - } + mmci_write_pwrreg(host, pwr); spin_unlock_irqrestore(&host->lock, flags); } diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 89eb2e3..d437ccf 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -179,7 +179,8 @@ struct mmci_host { unsigned int mclk; unsigned int cclk; - u32 pwr; + u32 pwr_reg; + u32 clk_reg; struct mmci_platform_data *plat; struct variant_data *variant;