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[209.132.180.67]) by mx.google.com with ESMTP id p10si11691359ioe.7.2015.10.15.06.47.22; Thu, 15 Oct 2015 06:47:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752351AbbJONrW (ORCPT + 7 others); Thu, 15 Oct 2015 09:47:22 -0400 Received: from mail-lf0-f52.google.com ([209.85.215.52]:36310 "EHLO mail-lf0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751790AbbJONrV (ORCPT ); Thu, 15 Oct 2015 09:47:21 -0400 Received: by lfeh64 with SMTP id h64so27726623lfe.3 for ; Thu, 15 Oct 2015 06:47:20 -0700 (PDT) X-Received: by 10.25.156.130 with SMTP id f124mr3021624lfe.46.1444916839964; Thu, 15 Oct 2015 06:47:19 -0700 (PDT) Received: from localhost.localdomain ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id ug9sm2056977lbb.22.2015.10.15.06.47.18 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Oct 2015 06:47:19 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Russell King Cc: Pawel Moll , Mark Rutland , Marc Zyngier , Will Deacon , Rob Herring , Linus Walleij , devicetree@vger.kernel.org Subject: [PATCH 03/13] irqchips: fix ARM11MPCore GIC bindings Date: Thu, 15 Oct 2015 15:46:43 +0200 Message-Id: <1444916813-31024-4-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1444916813-31024-1-git-send-email-linus.walleij@linaro.org> References: <1444916813-31024-1-git-send-email-linus.walleij@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.176 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The GIC bindings for the ARM11MPCore need to differentiate between the GIC on the Test Chip and the one on the evaluation baseboard. Split the binding in two and define new compatible-strings. Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/arm/gic.txt | 3 ++- drivers/irqchip/irq-gic.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index 2da059a4790c..a5445622c216 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -15,7 +15,8 @@ Main node required properties: "arm,cortex-a15-gic" "arm,cortex-a9-gic" "arm,cortex-a7-gic" - "arm,arm11mp-gic" + "arm,tc11mp-gic" + "arm,pb11mp-gic" "brcm,brahma-b15-gic" "arm,arm1176jzf-devchip-gic" "qcom,msm-8660-qgic" diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 982c09c2d791..5376d1cb0a4f 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -1184,7 +1184,8 @@ gic_of_init(struct device_node *node, struct device_node *parent) return 0; } IRQCHIP_DECLARE(gic_400, "arm,gic-400", gic_of_init); -IRQCHIP_DECLARE(arm11mp_gic, "arm,arm11mp-gic", gic_of_init); +IRQCHIP_DECLARE(armtc11mp_gic, "arm,tc11mp-gic", gic_of_init); +IRQCHIP_DECLARE(armpb11mp_gic, "arm,pb11mp-gic", gic_of_init); IRQCHIP_DECLARE(arm1176jzf_dc_gic, "arm,arm1176jzf-devchip-gic", gic_of_init); IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init); IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init);