diff mbox series

[v1,8/8] dt-bindings: pinctrl: convert ocelot-pinctrl to YAML format

Message ID 20220313152924.61931-9-michael@walle.cc
State New
Headers show
Series pinctrl: ocelot: convert to YAML format | expand

Commit Message

Michael Walle March 13, 2022, 3:29 p.m. UTC
Convert the ocelot-pinctrl device tree binding to the new YAML format.

Signed-off-by: Michael Walle <michael@walle.cc>
---
 .../bindings/pinctrl/mscc,ocelot-pinctrl.txt  | 42 ---------
 .../bindings/pinctrl/mscc,ocelot-pinctrl.yaml | 94 +++++++++++++++++++
 2 files changed, 94 insertions(+), 42 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt
 create mode 100644 Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml

Comments

Krzysztof Kozlowski March 13, 2022, 3:55 p.m. UTC | #1
On 13/03/2022 16:29, Michael Walle wrote:
> Convert the ocelot-pinctrl device tree binding to the new YAML format.
> 
> Signed-off-by: Michael Walle <michael@walle.cc>
> ---
>  .../bindings/pinctrl/mscc,ocelot-pinctrl.txt  | 42 ---------
>  .../bindings/pinctrl/mscc,ocelot-pinctrl.yaml | 94 +++++++++++++++++++
>  2 files changed, 94 insertions(+), 42 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt
>  create mode 100644 Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt
> deleted file mode 100644
> index 5d84fd299ccf..000000000000
> --- a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt
> +++ /dev/null
> @@ -1,42 +0,0 @@
> -Microsemi Ocelot pin controller Device Tree Bindings
> -----------------------------------------------------
> -
> -Required properties:
> - - compatible		: Should be "mscc,ocelot-pinctrl",
> -			  "mscc,jaguar2-pinctrl", "microchip,sparx5-pinctrl",
> -			  "mscc,luton-pinctrl", "mscc,serval-pinctrl",
> -			  "microchip,lan966x-pinctrl" or "mscc,servalt-pinctrl"
> - - reg			: Address and length of the register set for the device
> - - gpio-controller	: Indicates this device is a GPIO controller
> - - #gpio-cells		: Must be 2.
> -			  The first cell is the pin number and the
> -			  second cell specifies GPIO flags, as defined in
> -			  <dt-bindings/gpio/gpio.h>.
> - - gpio-ranges		: Range of pins managed by the GPIO controller.
> -
> -
> -The ocelot-pinctrl driver uses the generic pin multiplexing and generic pin
> -configuration documented in pinctrl-bindings.txt.
> -
> -The following generic properties are supported:
> - - function
> - - pins
> -
> -Example:
> -	gpio: pinctrl@71070034 {
> -		compatible = "mscc,ocelot-pinctrl";
> -		reg = <0x71070034 0x28>;
> -		gpio-controller;
> -		#gpio-cells = <2>;
> -		gpio-ranges = <&gpio 0 0 22>;
> -
> -		uart_pins: uart-pins {
> -				pins = "GPIO_6", "GPIO_7";
> -				function = "uart";
> -		};
> -
> -		uart2_pins: uart2-pins {
> -				pins = "GPIO_12", "GPIO_13";
> -				function = "uart2";
> -		};
> -	};
> diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml
> new file mode 100644
> index 000000000000..40148aef4ecf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml
> @@ -0,0 +1,94 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/mscc,ocelot-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microsemi Ocelot pin controller Device Tree Bindings

s/Device Tree Bindings//

> +
> +maintainers:
> +  - Alexandre Belloni <alexandre.belloni@bootlin.com>
> +  - Lars Povlsen <lars.povlsen@microchip.com>
> +
> +allOf:
> +  - $ref: "pinctrl.yaml#"
> +
> +properties:
> +  compatible:
> +    enum:
> +      - microchip,lan966x-pinctrl
> +      - microchip,sparx5-pinctrl
> +      - mscc,jaguar2-pinctrl
> +      - mscc,luton-pinctrl
> +      - mscc,ocelot-pinctrl
> +      - mscc,serval-pinctrl
> +      - mscc,servalt-pinctrl
> +
> +  reg: true

maxItems

> +
> +  gpio-controller: true
> +
> +  '#gpio-cells':
> +    const: 2
> +
> +  gpio-ranges: true
> +
> +  interrupts:
> +    maxItems: 1
> +    description: The GPIO parent interrupt.

Skip description, it's obvious.

> +
> +  interrupt-controller: true
> +
> +  "#interrupt-cells":
> +    const: 2
> +
> +required:
> +  - compatible
> +  - reg
> +  - gpio-controller
> +  - '#gpio-cells'
> +  - gpio-ranges

Put "required:" after "patternProperties:".

> +patternProperties:
> +  '-pins$':
> +    type: object
> +    allOf:
> +      - $ref: "pinmux-node.yaml"
> +      - $ref: "pincfg-node.yaml"


Best regards,
Krzysztof
Michael Walle March 13, 2022, 4:36 p.m. UTC | #2
Hi,

wow, you're fast!

Am 2022-03-13 16:55, schrieb Krzysztof Kozlowski:

>> +  reg: true
> 
> maxItems

There are up to two address ranges. The second one is only needed for
particular controllers (the sparx5 and the lan966x).

Is the following snippet the correct form?

   reg:
     items:
       - description: Base address
       - description: Extended pin configuration registers
     minItems: 1

-michael
Krzysztof Kozlowski March 13, 2022, 5:54 p.m. UTC | #3
On 13/03/2022 17:36, Michael Walle wrote:
> Hi,
> 
> wow, you're fast!
> 
> Am 2022-03-13 16:55, schrieb Krzysztof Kozlowski:
> 
>>> +  reg: true
>>
>> maxItems
> 
> There are up to two address ranges. The second one is only needed for
> particular controllers (the sparx5 and the lan966x).
> 
> Is the following snippet the correct form?
> 
>    reg:
>      items:
>        - description: Base address
>        - description: Extended pin configuration registers
>      minItems: 1

Yes, it's correct. Please also add proper "if:then" under "allOf:" (and
move such allOf under "required:") which changes minItems to two for
such controllers, based on compatible.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt
deleted file mode 100644
index 5d84fd299ccf..000000000000
--- a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt
+++ /dev/null
@@ -1,42 +0,0 @@ 
-Microsemi Ocelot pin controller Device Tree Bindings
-----------------------------------------------------
-
-Required properties:
- - compatible		: Should be "mscc,ocelot-pinctrl",
-			  "mscc,jaguar2-pinctrl", "microchip,sparx5-pinctrl",
-			  "mscc,luton-pinctrl", "mscc,serval-pinctrl",
-			  "microchip,lan966x-pinctrl" or "mscc,servalt-pinctrl"
- - reg			: Address and length of the register set for the device
- - gpio-controller	: Indicates this device is a GPIO controller
- - #gpio-cells		: Must be 2.
-			  The first cell is the pin number and the
-			  second cell specifies GPIO flags, as defined in
-			  <dt-bindings/gpio/gpio.h>.
- - gpio-ranges		: Range of pins managed by the GPIO controller.
-
-
-The ocelot-pinctrl driver uses the generic pin multiplexing and generic pin
-configuration documented in pinctrl-bindings.txt.
-
-The following generic properties are supported:
- - function
- - pins
-
-Example:
-	gpio: pinctrl@71070034 {
-		compatible = "mscc,ocelot-pinctrl";
-		reg = <0x71070034 0x28>;
-		gpio-controller;
-		#gpio-cells = <2>;
-		gpio-ranges = <&gpio 0 0 22>;
-
-		uart_pins: uart-pins {
-				pins = "GPIO_6", "GPIO_7";
-				function = "uart";
-		};
-
-		uart2_pins: uart2-pins {
-				pins = "GPIO_12", "GPIO_13";
-				function = "uart2";
-		};
-	};
diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml
new file mode 100644
index 000000000000..40148aef4ecf
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml
@@ -0,0 +1,94 @@ 
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/mscc,ocelot-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microsemi Ocelot pin controller Device Tree Bindings
+
+maintainers:
+  - Alexandre Belloni <alexandre.belloni@bootlin.com>
+  - Lars Povlsen <lars.povlsen@microchip.com>
+
+allOf:
+  - $ref: "pinctrl.yaml#"
+
+properties:
+  compatible:
+    enum:
+      - microchip,lan966x-pinctrl
+      - microchip,sparx5-pinctrl
+      - mscc,jaguar2-pinctrl
+      - mscc,luton-pinctrl
+      - mscc,ocelot-pinctrl
+      - mscc,serval-pinctrl
+      - mscc,servalt-pinctrl
+
+  reg: true
+
+  gpio-controller: true
+
+  '#gpio-cells':
+    const: 2
+
+  gpio-ranges: true
+
+  interrupts:
+    maxItems: 1
+    description: The GPIO parent interrupt.
+
+  interrupt-controller: true
+
+  "#interrupt-cells":
+    const: 2
+
+required:
+  - compatible
+  - reg
+  - gpio-controller
+  - '#gpio-cells'
+  - gpio-ranges
+
+patternProperties:
+  '-pins$':
+    type: object
+    allOf:
+      - $ref: "pinmux-node.yaml"
+      - $ref: "pincfg-node.yaml"
+
+    properties:
+      function: true
+      pins: true
+      output-high: true
+      output-low: true
+      drive-strength: true
+
+    required:
+      - function
+      - pins
+
+    additionalProperties: false
+
+additionalProperties: false
+
+examples:
+  - |
+    gpio: pinctrl@71070034 {
+        compatible = "mscc,ocelot-pinctrl";
+        reg = <0x71070034 0x28>;
+        gpio-controller;
+        #gpio-cells = <2>;
+        gpio-ranges = <&gpio 0 0 22>;
+
+        uart_pins: uart-pins {
+            pins = "GPIO_6", "GPIO_7";
+            function = "uart";
+        };
+
+        uart2_pins: uart2-pins {
+            pins = "GPIO_12", "GPIO_13";
+            function = "uart2";
+        };
+    };
+
+...