[ARM/AARCH64] add initial Qualcomm processor support

Message ID CABXYE2UCEoAY2ZuuH-V-Nu+8=q=0dY0rgu8+LZMCPBPHcCOT3w@mail.gmail.com
State New
Headers show

Commit Message

Jim Wilson Nov. 9, 2015, 11:36 p.m.
This patch adds initial support for the Qualcomm qdf24xx server chips.
This was tested with armhf and aarch64 cross builds and make check.

Jim

Comments

Marcus Shawcroft Nov. 10, 2015, 10:53 a.m. | #1
On 10 November 2015 at 10:34, Ramana Radhakrishnan
<ramana.gcc@googlemail.com> wrote:
> On Mon, Nov 9, 2015 at 11:36 PM, Jim Wilson <jim.wilson@linaro.org> wrote:

>> This patch adds initial support for the Qualcomm qdf24xx server chips.

>> This was tested with armhf and aarch64 cross builds and make check.

>>

>

> The ARM bits are ok. Please wait for an AArch64 maintainer to ack.

>

> Ramana



AArch64 bits are OK.

/Marcus

Patch hide | download patch | download mbox

 gas/ChangeLog           | 6 ++++++
 gas/config/tc-aarch64.c | 3 +++
 gas/config/tc-arm.c     | 4 ++++
 gas/doc/c-aarch64.texi  | 1 +
 gas/doc/c-arm.texi      | 1 +
 5 files changed, 15 insertions(+)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2214ed3..2aaf0b7 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@ 
+2015-11-09  Jim Wilson  <jim.wilson@linaro.org>
+
+	* config/tc-aarch64.c (aarch64_cpus): Add qdf24xx.
+	* config/tc-arm.c (arm_cpus): Likewise.
+	* doc/c-arm.texi, doc/c-aarch64.texi: Likewise.
+
 2015-11-09  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 
 	* read.c (parse_bitfield_cons): Fix left shift of negative value.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 2cc7b4b..b45aac8 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -7685,6 +7685,9 @@  static const struct aarch64_cpu_option_table aarch64_cpus[] = {
   {"exynos-m1", AARCH64_FEATURE (AARCH64_ARCH_V8,
 				 AARCH64_FEATURE_CRC | AARCH64_FEATURE_CRYPTO),
 				"Samsung Exynos M1"},
+  {"qdf24xx", AARCH64_FEATURE (AARCH64_ARCH_V8,
+			       AARCH64_FEATURE_CRC | AARCH64_FEATURE_CRYPTO),
+   "Qualcomm QDF24XX"},
   {"thunderx", AARCH64_FEATURE (AARCH64_ARCH_V8,
 				AARCH64_FEATURE_CRC | AARCH64_FEATURE_CRYPTO),
    "Cavium ThunderX"},
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index de99d72..e33a77f 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -24743,6 +24743,10 @@  static const struct arm_cpu_option_table arm_cpus[] =
   ARM_CPU_OPT ("exynos-m1",	ARM_ARCH_V8A,	 FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
 								  "Samsung " \
 								  "Exynos M1"),
+  ARM_CPU_OPT ("qdf24xx",	ARM_ARCH_V8A,	 FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
+								  "Qualcomm "
+								  "QDF24XX"),
+
   /* ??? XSCALE is really an architecture.  */
   ARM_CPU_OPT ("xscale",	ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2, NULL),
   /* ??? iwmmxt is not a processor.  */
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 2053990..e3ca09d 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -59,6 +59,7 @@  on the target processor.  The following processor names are recognized:
 @code{cortex-a57},
 @code{cortex-a72},
 @code{exynos-m1},
+@code{qdf24xx},
 @code{thunderx},
 @code{xgene1}
 and
diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi
index e41943b..661f631 100644
--- a/gas/doc/c-arm.texi
+++ b/gas/doc/c-arm.texi
@@ -135,6 +135,7 @@  recognized:
 @code{exynos-m1},
 @code{marvell-pj4},
 @code{marvell-whitney},
+@code{qdf24xx},
 @code{xgene1},
 @code{xgene2},
 @code{ep9312} (ARM920 with Cirrus Maverick coprocessor),