[7/7] dt: update fsl-esdhc bindings for imx esdhc OF support

Message ID 1300112759-3495-8-git-send-email-shawn.guo@linaro.org
State New
Headers show

Commit Message

Shawn Guo March 14, 2011, 2:25 p.m.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 .../devicetree/bindings/mmc/fsl-esdhc.txt          |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

Patch

diff --git a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
index 64bcb8b..fac52e2 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
+++ b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
@@ -9,7 +9,10 @@  Required properties:
   - reg : should contain eSDHC registers location and length.
   - interrupts : should contain eSDHC interrupt.
   - interrupt-parent : interrupt source phandle.
-  - clock-frequency : specifies eSDHC base clock frequency.
+  - clock-frequency : (mandatory for powerpc platform) specifies
+    eSDHC base clock frequency.
+  - bus-clock : (mandatory for arm platform) specifies phandle of
+    eSDHC clock provider.
   - sdhci,wp-inverted : (optional) specifies that eSDHC controller
     reports inverted write-protect state;
   - sdhci,1-bit-only : (optional) specifies that a controller can