@@ -368,58 +368,13 @@ static unsigned int cqspi_calc_dummy(const struct spi_mem_op *op, bool dtr)
return dummy_clk;
}
-static int cqspi_set_protocol(struct cqspi_flash_pdata *f_pdata,
- const struct spi_mem_op *op)
+static void cqspi_set_protocol(struct cqspi_flash_pdata *f_pdata,
+ const struct spi_mem_op *op)
{
- /*
- * For an op to be DTR, cmd phase along with every other non-empty
- * phase should have dtr field set to 1. If an op phase has zero
- * nbytes, ignore its dtr field; otherwise, check its dtr field.
- */
- f_pdata->dtr = op->cmd.dtr &&
- (!op->addr.nbytes || op->addr.dtr) &&
- (!op->data.nbytes || op->data.dtr);
-
- f_pdata->inst_width = 0;
- if (op->cmd.buswidth)
- f_pdata->inst_width = ilog2(op->cmd.buswidth);
-
- f_pdata->addr_width = 0;
- if (op->addr.buswidth)
- f_pdata->addr_width = ilog2(op->addr.buswidth);
-
- f_pdata->data_width = 0;
- if (op->data.buswidth)
- f_pdata->data_width = ilog2(op->data.buswidth);
-
- /* Right now we only support 8-8-8 DTR mode. */
- if (f_pdata->dtr) {
- switch (op->cmd.buswidth) {
- case 0:
- case 8:
- break;
- default:
- return -EINVAL;
- }
-
- switch (op->addr.buswidth) {
- case 0:
- case 8:
- break;
- default:
- return -EINVAL;
- }
-
- switch (op->data.buswidth) {
- case 0:
- case 8:
- break;
- default:
- return -EINVAL;
- }
- }
-
- return 0;
+ f_pdata->inst_width = op->cmd.nbytes ? ilog2(op->cmd.buswidth) : 0;
+ f_pdata->addr_width = op->addr.nbytes ? ilog2(op->addr.buswidth) : 0;
+ f_pdata->data_width = op->data.nbytes ? ilog2(op->data.buswidth) : 0;
+ f_pdata->dtr = op->cmd.dtr;
}
static int cqspi_wait_idle(struct cqspi_st *cqspi)
@@ -549,9 +504,7 @@ static int cqspi_command_read(struct cqspi_flash_pdata *f_pdata,
size_t read_len;
int status;
- status = cqspi_set_protocol(f_pdata, op);
- if (status)
- return status;
+ cqspi_set_protocol(f_pdata, op);
status = cqspi_enable_dtr(f_pdata, op, CQSPI_REG_OP_EXT_STIG_LSB,
f_pdata->dtr);
@@ -622,9 +575,7 @@ static int cqspi_command_write(struct cqspi_flash_pdata *f_pdata,
size_t write_len;
int ret;
- ret = cqspi_set_protocol(f_pdata, op);
- if (ret)
- return ret;
+ cqspi_set_protocol(f_pdata, op);
ret = cqspi_enable_dtr(f_pdata, op, CQSPI_REG_OP_EXT_STIG_LSB,
f_pdata->dtr);
@@ -1244,9 +1195,7 @@ static ssize_t cqspi_write(struct cqspi_flash_pdata *f_pdata,
const u_char *buf = op->data.buf.out;
int ret;
- ret = cqspi_set_protocol(f_pdata, op);
- if (ret)
- return ret;
+ cqspi_set_protocol(f_pdata, op);
ret = cqspi_write_setup(f_pdata, op);
if (ret)
@@ -1348,9 +1297,7 @@ static ssize_t cqspi_read(struct cqspi_flash_pdata *f_pdata,
int ret;
ddata = of_device_get_match_data(dev);
- ret = cqspi_set_protocol(f_pdata, op);
- if (ret)
- return ret;
+ cqspi_set_protocol(f_pdata, op);
ret = cqspi_read_setup(f_pdata, op);
if (ret)
- Remove checks for unsupported modes that are already handled by supports_op(). This allows to change the function to return void. - Distinguishing DTR and non-DTR modes is not necessary for the setup of the bus widths - Only cmd DTR flag needs to be checked, supports_op() already checks that the DTR flags of all relevant parts of the op match - Check nbytes instead of buswidth for 0, for consistency with supports_op() etc. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> --- drivers/spi/spi-cadence-quadspi.c | 73 +++++-------------------------- 1 file changed, 10 insertions(+), 63 deletions(-)