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ARMV7: S5PC210: Fixed register offset in mmc.h

Message ID 1300180689-3058-1-git-send-email-chander.kashyap@linaro.org
State Superseded
Headers show

Commit Message

Chander Kashyap March 15, 2011, 9:18 a.m. UTC 
MMC controller "control4" register offset set to
0x8C as per data sheet.
Added missed out reserved field.
Updated padding field size.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
---
 arch/arm/include/asm/arch-s5pc2xx/mmc.h |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)
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Patch

diff --git a/arch/arm/include/asm/arch-s5pc2xx/mmc.h b/arch/arm/include/asm/arch-s5pc2xx/mmc.h
index 528150d..04827ca 100644
--- a/arch/arm/include/asm/arch-s5pc2xx/mmc.h
+++ b/arch/arm/include/asm/arch-s5pc2xx/mmc.h
@@ -53,10 +53,11 @@  struct s5p_mmc {
 	unsigned char	res3[0x34];
 	unsigned int	control2;
 	unsigned int	control3;
+	unsigned char	res4[4];
 	unsigned int	control4;
-	unsigned char	res4[0x6e];
+	unsigned char	res5[0x6e];
 	unsigned short	hcver;
-	unsigned char	res5[0xFF02];
+	unsigned char	res6[0xFF00];
 };
 
 struct mmc_host {