| Message ID | 20220502165210.1956397-10-mkl@pengutronix.de |
|---|---|
| State | Accepted |
| Commit | 184434fcd6177b76f929570348935d7c9f22d296 |
| Headers | show |
| Series | spi: spi-imx: cleanups and performance improvements | expand |
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 798a5182b849..addfed56f1d4 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -519,6 +519,7 @@ static int mx51_ecspi_prepare_message(struct spi_imx_data *spi_imx, u32 min_speed_hz = ~0U; u32 testreg, delay; u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG); + u32 current_cfg = cfg; /* set Master or Slave mode */ if (spi_imx->slave_mode) @@ -576,6 +577,9 @@ static int mx51_ecspi_prepare_message(struct spi_imx_data *spi_imx, else cfg &= ~MX51_ECSPI_CONFIG_SSBPOL(spi->chip_select); + if (cfg == current_cfg) + return 0; + writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG); /*
In mx51_ecspi_prepare_message() the MX51_ECSPI_CONFIG register is setup for the current spi_message. After writing the register, there is a delay to ensure that the changes hit the hardware. This patch checks if the register MX51_ECSPI_CONFIG actually needs to be changed. If the register content is unchanged the function is left early, skipping the write to the hardware and the delay. This leads to a small, but measurable performance increase. For a given workload with small transfers on an imx6 single core the CPU load decreases from 30% to ~27%. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> --- drivers/spi/spi-imx.c | 4 ++++ 1 file changed, 4 insertions(+)