diff mbox

[3/4] dmaengine: qcom_bam_dma: use correct pipe FIFO size

Message ID 1448961299-15161-4-git-send-email-stanimir.varbanov@linaro.org
State Superseded
Headers show

Commit Message

Stanimir Varbanov Dec. 1, 2015, 9:14 a.m. UTC
The pipe fifo size register must instruct the bam hw
how many hw descriptors can be pushed to fifo. Currently
we isntruct the hw with 32KBytes but wrap the tail in
bam_start_dma in BAM_P_EVNT_REG on 4095 i.e. 32760. This
leads to stalled transactions when the tail wraps.

Fix this by use the correct fifo size in BAM_P_FIFO_SIZES
register i.e. 32K - 8.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>

---
 drivers/dma/qcom_bam_dma.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
1.7.9.5

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Comments

Andy Gross Jan. 29, 2016, 4:38 a.m. UTC | #1
On Thu, Dec 10, 2015 at 03:18:33PM +0200, Stanimir Varbanov wrote:

<snip>

> >>> This is just using the #define.  That is ok, but if you use this instead of the

> >>> BAM_P_FIFO_SIZES then you need to fix your comment.  Or actually use the

> >>> register value.... otherwise looks fine.

> >>

> >> I did not follow your comment, but the intension of the patch is to set

> >> the proper FIFO size in BAM_P_FIFO_SIZES register, i.e. 32K - 8.

> > 

> > Sorry, I mixed up the usage and was thinking there was something you read out

> > that told you the size.  That's not how it works, unfortunately.  The

> > MAX_DATA_SIZE is fine, but the name is a little misleading.  Perhaps just

> > BAM_FIFO_SIZE?

> 

> OK I can rename BAM_MAX_DATA_SIZE to BAM_FIFO_SIZE, and use it when

> setting BAM_P_FIFO_SIZES register. Is that fine to you?


Yes that's fine with me.

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diff mbox

Patch

diff --git a/drivers/dma/qcom_bam_dma.c b/drivers/dma/qcom_bam_dma.c
index 0f06f3b7a72b..6d290de9ab2b 100644
--- a/drivers/dma/qcom_bam_dma.c
+++ b/drivers/dma/qcom_bam_dma.c
@@ -458,7 +458,7 @@  static void bam_chan_init_hw(struct bam_chan *bchan,
 	 */
 	writel_relaxed(ALIGN(bchan->fifo_phys, sizeof(struct bam_desc_hw)),
 			bam_addr(bdev, bchan->id, BAM_P_DESC_FIFO_ADDR));
-	writel_relaxed(BAM_DESC_FIFO_SIZE,
+	writel_relaxed(BAM_MAX_DATA_SIZE,
 			bam_addr(bdev, bchan->id, BAM_P_FIFO_SIZES));
 
 	/* enable the per pipe interrupts, enable EOT, ERR, and INT irqs */