| Message ID | 20220610085706.15741-12-Sergey.Semin@baikalelectronics.ru |
|---|---|
| State | New |
| Headers | show |
| Series | None | expand |
diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 142bbe577763..d5de609f2145 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -14,10 +14,11 @@ maintainers: description: |+ RK3568 SoC PCIe host controller is based on the Synopsys DesignWare PCIe IP and thus inherits all the common properties defined in - designware-pcie.txt. + snps,dw-pcie-common.yaml. allOf: - $ref: /schemas/pci/pci-bus.yaml# + - $ref: /schemas/pci/snps,dw-pcie-common.yaml# # We need a select here so we don't match all nodes with 'snps,dw-pcie' select:
As the DT-bindings description states the Rockchip PCIe controller is based on the DW PCIe RP IP-core thus its DT-nodes are supposed to be compatible with the common DW PCIe controller schema. Let's make sure they evaluated against it by referring to the snps,dw-pcie-common.yaml schema in the allOf sub-schemas composition. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> --- Changelog v3: - This is a new patch created on v3 lap of the series. --- Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)