| Message ID | 20220610084340.2268-3-ctcchien@nuvoton.com |
|---|---|
| State | New |
| Headers | show |
| Series | EDAC: nuvoton: Add nuvoton NPCM memory controller driver | expand |
On Fri, Jun 10, 2022 at 04:43:39PM +0800, medadyoung@gmail.com wrote: > From: Medad CChien <ctcchien@nuvoton.com> > > ECC must be configured in the BootBlock header. > Then, you can read error counts via the EDAC kernel framework. > > Signed-off-by: Medad CChien <ctcchien@nuvoton.com> > --- > arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi > index 3696980a3da1..ba542b26941e 100644 > --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi > +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi > @@ -106,6 +106,13 @@ > interrupt-parent = <&gic>; > ranges; > > + mc: memory-controller@f0824000 { > + compatible = "nuvoton,npcm750-memory-controller"; > + reg = <0x0 0xf0824000 0x0 0x1000>; > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; > + status = "disabled"; > + }; > + > rstc: rstc@f0801000 { > compatible = "nuvoton,npcm750-reset"; > reg = <0xf0801000 0x70>; > -- This one needs an Ack from DT folks.
diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi index 3696980a3da1..ba542b26941e 100644 --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi @@ -106,6 +106,13 @@ interrupt-parent = <&gic>; ranges; + mc: memory-controller@f0824000 { + compatible = "nuvoton,npcm750-memory-controller"; + reg = <0x0 0xf0824000 0x0 0x1000>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + rstc: rstc@f0801000 { compatible = "nuvoton,npcm750-reset"; reg = <0xf0801000 0x70>;