[v2] rt: x86: enable preemption in IST exception for x86-32

Message ID 1450134404-16662-1-git-send-email-yang.shi@linaro.org
State New
Headers show

Commit Message

Yang Shi Dec. 14, 2015, 11:06 p.m.
When running some ptrace single step tests on x86-32 machine, the below problem
is triggered:

BUG: sleeping function called from invalid context at linux-rt/kernel/locking/rtmutex.c:917
in_atomic(): 1, irqs_disabled(): 0, pid: 1041, name: dummy2
INFO: lockdep is turned off.
Preemption disabled at:[<c100326f>] do_debug+0x1f/0x1a0

CPU: 10 PID: 1041 Comm: dummy2 Tainted: G        W       4.1.13-rt13 #1
Hardware name: Intel Corporation S5520HC/S5520HC, BIOS S5500.86B.01.10.0025.030220091519 03/02/2009
 00000000 00000000 e1811e80 c1aa8306 00000000 e1811ea8 c1080517 c1d8b2e8
 c100326f c100326f 00000411 e5b7d5b4 e1d521c4 00000005 e1811f74 e1811ec4
 c1ab0eff e1d51cc0 e5b7d180 c1081403 e5b7d180 e5b7d180 e1811ee4 c1064b5a
Call Trace:
 [<c1aa8306>] dump_stack+0x46/0x5c
 [<c1080517>] ___might_sleep+0x137/0x220
 [<c100326f>] ? do_debug+0x1f/0x1a0
 [<c100326f>] ? do_debug+0x1f/0x1a0
 [<c1ab0eff>] rt_spin_lock+0x1f/0x80
 [<c1081403>] ? preempt_count_sub+0xb3/0x110
 [<c1064b5a>] do_force_sig_info+0x2a/0xc0
 [<c106567d>] force_sig_info+0xd/0x10
 [<c1010cff>] send_sigtrap+0x6f/0x80
 [<c10033b1>] do_debug+0x161/0x1a0
 [<c1ab2921>] debug_stack_correct+0x2e/0x35

Mainline kernel commit 959274753857efe9c5f1ba35fe727f51e9aa128d
("x86, traps: Track entry into and exit from IST context"), introduced
ist_enter which disables preemption uncondiontionally for both x86-64 and
x86-32. However, x86-32 does not have an IST and the stack still belongs to
the current task and there is no problem in scheduling out the task.

Signed-off-by: Yang Shi <yang.shi@linaro.org>

---
 arch/x86/kernel/traps.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

-- 
2.0.2

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Comments

Yang Shi Dec. 22, 2015, 6:12 p.m. | #1
On 12/22/2015 4:06 AM, Sebastian Andrzej Siewior wrote:
> * Yang Shi | 2015-12-14 15:06:44 [-0800]:

>

>> Mainline kernel commit 959274753857efe9c5f1ba35fe727f51e9aa128d

>> ("x86, traps: Track entry into and exit from IST context"), introduced

>> ist_enter which disables preemption uncondiontionally for both x86-64 and

>> x86-32. However, x86-32 does not have an IST and the stack still belongs to

>> the current task and there is no problem in scheduling out the task.

>

> no no. So from a quick look I *assumed* you merged your v1 and revert of the

> Steven's patch into one piece. But now I see that you don't disable preemption

> 64bit which means you revert upstream change.


No, I neither merged my v1 patch nor reverted Steven's patch.

Directed by Thomas's suggestion in v1 patch review, I looked into the 
code further.

Currently, the code does:

ist_enter disables preemption unconditionally for both x86-64 and x86-32 
(by mainline commit). So, for the x86-64 part, it is fine since the 
preemption should be disabled because ist exception will use per CPU 
stack and signal delay send is necessary.

But, disabling preemption on x86-32 is unnecessary since it doesn't have 
ist stacks, so the v2 patch re-enables preemption for x86-32.

upstream commit 959274753857efe9c5f1ba35fe727f51e9aa128d ("x86, traps: 
Track entry into and exit from IST context") commit log has more details 
for the ist stacks.

So, #1) v1 patch is not needed anymore since x86-32 still doesn't need 
signal delay send in v2, #2) don't need revert Steven's patch, the logic 
is just changed slightly (#ifdef CONFIG_X86_64 --> #if 
!defined(CONFIG_X86_64)) and adopted the mainline APIs.

So, this is definitely a new approach for fixing the same problem and 
*not* an incremental patch.

>

> Here is what happens:

> - I drop your v2

> - I merge your v1 with updated patch description

> - I revert "x86: Do not disable preemption in int3 on 32bit". If someone

>    wants to skip the delayed signal on 32bit please address this upstream

>    first (that is skip the preempt_disable() on 32bit if it is not

>    required there).

> - Yang Shi, please send a changelong if you send incremental patches.


Sorry for any inconvenience. I should made the comment clearer at the 
first place even though it is not an incremental patch.

Thanks,
Yang

>

> Sebastian

>


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Patch hide | download patch | download mbox

diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index ebae118..7139bc0 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -90,7 +90,7 @@  static inline void conditional_sti(struct pt_regs *regs)
 
 static inline void conditional_sti_ist(struct pt_regs *regs)
 {
-#ifdef CONFIG_X86_64
+#if !defined(CONFIG_X86_64)
 	/*
 	 * X86_64 uses a per CPU stack on the IST for certain traps
 	 * like int3. The task can not be preempted when using one
@@ -101,7 +101,7 @@  static inline void conditional_sti_ist(struct pt_regs *regs)
 	 * On x86_32 the task keeps its own stack and it is OK if the
 	 * task schedules out.
 	 */
-	preempt_count_inc();
+	ist_begin_non_atomic(regs);
 #endif
 	if (regs->flags & X86_EFLAGS_IF)
 		local_irq_enable();
@@ -117,8 +117,8 @@  static inline void conditional_cli_ist(struct pt_regs *regs)
 {
 	if (regs->flags & X86_EFLAGS_IF)
 		local_irq_disable();
-#ifdef CONFIG_X86_64
-	preempt_count_dec();
+#if !defined(CONFIG_X86_64)
+	ist_end_non_atomic();
 #endif
 }