diff mbox series

[v2,1/2] ARM: dts: lan966x: add clock gating register

Message ID 20220707132500.1708020-1-michael@walle.cc
State Accepted
Commit 819c620507229332e2a038b1d742ee1eee5946ad
Headers show
Series [v2,1/2] ARM: dts: lan966x: add clock gating register | expand

Commit Message

Michael Walle July 7, 2022, 1:24 p.m. UTC
The clock controller supports an optional clock gating register. This is
necessary to expose the USB device clock, for example. Add it.

Signed-off-by: Michael Walle <michael@walle.cc>
---
changes since v1:
 - none

 arch/arm/boot/dts/lan966x.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Claudiu Beznea July 11, 2022, 7:15 a.m. UTC | #1
On 07.07.2022 16:25, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Now that there is driver support for the USB device, enable it.
> 
> Signed-off-by: Michael Walle <michael@walle.cc>

Applied to at91-dt, thanks!

> ---
> changes since v1:
>  - add pinctrl node, Thanks Claudiu
> 
>  .../boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi   | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi b/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi
> index 5a6c5f7c371a..3eecaa1b7205 100644
> --- a/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi
> +++ b/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi
> @@ -76,6 +76,12 @@ usart0_pins: usart0-pins {
>                 pins = "GPIO_25", "GPIO_26";
>                 function = "fc0_b";
>         };
> +
> +       usbs_a_pins: usbs-a-pins {
> +               /* VBUS_DET */
> +               pins = "GPIO_66";
> +               function = "gpio";
> +       };
>  };
> 
>  &mdio0 {
> @@ -200,6 +206,13 @@ &switch {
>         status = "okay";
>  };
> 
> +&udc {
> +       pinctrl-0 = <&usbs_a_pins>;
> +       pinctrl-names = "default";
> +       atmel,vbus-gpio = <&gpio 66 GPIO_ACTIVE_HIGH>;
> +       status = "okay";
> +};
> +
>  &watchdog {
>         status = "okay";
>  };
> --
> 2.30.2
>
Michael Walle July 19, 2022, 1:24 p.m. UTC | #2
Hi Claudiu,

Am 2022-07-12 09:22, schrieb Claudiu.Beznea@microchip.com:
> On 11.07.2022 10:15, Claudiu Beznea - M18063 wrote:
>> On 07.07.2022 16:24, Michael Walle wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you 
>>> know the content is safe
>>> 
>>> The clock controller supports an optional clock gating register. This 
>>> is
>>> necessary to expose the USB device clock, for example. Add it.
>>> 
>>> Signed-off-by: Michael Walle <michael@walle.cc>
>> 
>> Applied to at91-dt, thanks!
> 
> Actually, I will postpone this until [1] is accepted as current driver 
> may
> fail if this patch is applied.

Which was picked today :)

-michael
Claudiu Beznea July 20, 2022, 6:52 a.m. UTC | #3
On 19.07.2022 16:24, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> 
> Hi Claudiu,
> 
> Am 2022-07-12 09:22, schrieb Claudiu.Beznea@microchip.com:
>> On 11.07.2022 10:15, Claudiu Beznea - M18063 wrote:
>>> On 07.07.2022 16:24, Michael Walle wrote:
>>>> EXTERNAL EMAIL: Do not click links or open attachments unless you
>>>> know the content is safe
>>>>
>>>> The clock controller supports an optional clock gating register. This
>>>> is
>>>> necessary to expose the USB device clock, for example. Add it.
>>>>
>>>> Signed-off-by: Michael Walle <michael@walle.cc>
>>>
>>> Applied to at91-dt, thanks!
>>
>> Actually, I will postpone this until [1] is accepted as current driver
>> may
>> fail if this patch is applied.
> 
> Which was picked today :)

Yes. It's on at91-dt again, thanks!

> 
> -michael
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 57cb67a180ec..bc102677ff91 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -65,7 +65,7 @@  clks: clock-controller@e00c00a8 {
 		#clock-cells = <1>;
 		clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
 		clock-names = "cpu", "ddr", "sys";
-		reg = <0xe00c00a8 0x38>;
+		reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>;
 	};
 
 	timer {