| Message ID | 20220707170049.216556-1-Perry.Yuan@amd.com |
|---|---|
| State | Superseded |
| Headers | show
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From: Perry Yuan <Perry.Yuan@amd.com>
To: <rafael.j.wysocki@intel.com>, <viresh.kumar@linaro.org>,
<Ray.Huang@amd.com>, Huang Rui <ray.huang@amd.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
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CC: <Deepak.Sharma@amd.com>, <Mario.Limonciello@amd.com>,
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<Jinzhou.Su@amd.com>, <Xinmei.Huang@amd.com>,
<Xiaojian.Du@amd.com>, <Li.Meng@amd.com>,
Perry Yuan <Perry.Yuan@amd.com>
Subject: [PATCH 09/12] cpufreq: amd-pstate: update pstate frequency transition
delay time
Date: Thu, 7 Jul 2022 13:00:49 -0400
Message-ID: <20220707170049.216556-1-Perry.Yuan@amd.com>
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|
| Series |
[01/12] x86/msr: Add the MSR definition for AMD CPPC hardware control.
|
expand
|
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 173a45cf292a..b54b3b559993 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -41,7 +41,7 @@ #include <asm/msr.h> #include "amd-pstate-trace.h" -#define AMD_PSTATE_TRANSITION_LATENCY 0x20000 +#define AMD_PSTATE_TRANSITION_LATENCY 20000 #define AMD_PSTATE_TRANSITION_DELAY 500 /*
change the default transition latency to be 20ms that is more reasonable transition delay for AMD processors. Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> --- drivers/cpufreq/amd-pstate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)