diff mbox series

arm64: dts: qcom: sc8280xp: Fix PMU interrupt

Message ID 20220713143429.22624-1-manivannan.sadhasivam@linaro.org
State Accepted
Commit 39aa5646adae386719100e9e555a40e9db7bc4a2
Headers show
Series arm64: dts: qcom: sc8280xp: Fix PMU interrupt | expand

Commit Message

Manivannan Sadhasivam July 13, 2022, 2:34 p.m. UTC
PPI interrupt should be 7 for the PMU.

Cc: Johan Hovold <johan+linaro@kernel.org>
Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Reported-by: Steve Capper <Steve.Capper@arm.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Andrew Halaney July 13, 2022, 2:51 p.m. UTC | #1
On Wed, Jul 13, 2022 at 08:04:29PM +0530, Manivannan Sadhasivam wrote:
> PPI interrupt should be 7 for the PMU.
> 
> Cc: Johan Hovold <johan+linaro@kernel.org>
> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> Reported-by: Steve Capper <Steve.Capper@arm.com>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 268ab423577a..2d7823cb783c 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -477,7 +477,7 @@ memory@80000000 {
>  
>  	pmu {
>  		compatible = "arm,armv8-pmuv3";
> -		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
>  	};
>  
>  	psci {
> -- 
> 2.25.1
> 

Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Johan Hovold July 13, 2022, 2:55 p.m. UTC | #2
On Wed, Jul 13, 2022 at 08:04:29PM +0530, Manivannan Sadhasivam wrote:
> PPI interrupt should be 7 for the PMU.
> 
> Cc: Johan Hovold <johan+linaro@kernel.org>
> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> Reported-by: Steve Capper <Steve.Capper@arm.com>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 268ab423577a..2d7823cb783c 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -477,7 +477,7 @@ memory@80000000 {
>  
>  	pmu {
>  		compatible = "arm,armv8-pmuv3";
> -		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
>  	};
>  
>  	psci {

The interrupt number matches the vendor devicetree I have access to, but
the vendor source also has IRQ_TYPE_LEVEL_LOW instead of
IRQ_TYPE_LEVEL_HIGH here.

Is that another copy-paste error, perhaps?

Johan
Andrew Halaney July 13, 2022, 3:26 p.m. UTC | #3
On Wed, Jul 13, 2022 at 08:43:05PM +0530, Manivannan Sadhasivam wrote:
> On Wed, Jul 13, 2022 at 04:55:12PM +0200, Johan Hovold wrote:
> > On Wed, Jul 13, 2022 at 08:04:29PM +0530, Manivannan Sadhasivam wrote:
> > > PPI interrupt should be 7 for the PMU.
> > > 
> > > Cc: Johan Hovold <johan+linaro@kernel.org>
> > > Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> > > Reported-by: Steve Capper <Steve.Capper@arm.com>
> > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > > ---
> > >  arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > > index 268ab423577a..2d7823cb783c 100644
> > > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > > @@ -477,7 +477,7 @@ memory@80000000 {
> > >  
> > >  	pmu {
> > >  		compatible = "arm,armv8-pmuv3";
> > > -		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
> > > +		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > >  	};
> > >  
> > >  	psci {
> > 
> > The interrupt number matches the vendor devicetree I have access to, but
> > the vendor source also has IRQ_TYPE_LEVEL_LOW instead of
> > IRQ_TYPE_LEVEL_HIGH here.

+1 to what I see as well, fwiw. Totally missed that when reviewing
earlier.

> > 
> > Is that another copy-paste error, perhaps?
> > 
> 
> I don't have access to the documentation of this SoC now but since Steve
> tried with IRQ_TYPE_LEVEL_HIGH and it worked for him, I think it is best
> to leave it as it is.
> 
> Thanks,
> Mani
> 
> > Johan
>
Bjorn Andersson July 16, 2022, 3:18 p.m. UTC | #4
On Wed, 13 Jul 2022 20:04:29 +0530, Manivannan Sadhasivam wrote:
> PPI interrupt should be 7 for the PMU.
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: sc8280xp: Fix PMU interrupt
      commit: 39aa5646adae386719100e9e555a40e9db7bc4a2

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 268ab423577a..2d7823cb783c 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -477,7 +477,7 @@  memory@80000000 {
 
 	pmu {
 		compatible = "arm,armv8-pmuv3";
-		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
 	psci {