| Message ID | 20220725193547.1038414-1-martin.blumenstingl@googlemail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [RFC,v1] spi: realtek-rtl: Fix clearing some register bits | expand |
Hi Martin, On 7/28/22 17:27, Martin Blumenstingl wrote: > Your patch actually addresses an issue which I have seen with RTL_SPI_SFCSR_CS. > Since you seem to have boards with these Realtek SoCs: could you > please clean up your patch and upstream it (splitting into smaller > patches if/where needed)? That would be a win-win: upstream gains > improved SPI support and I won't be confused the next time I look at > the spi-realtek-rtl driver. Thanks for suggesting this! I will send a patch-set later today along these lines, I first need to set up a linux dev environment as the development so far was within OpenWRT. Cheers, Birger
Hi Birger, On Fri, Jul 29, 2022 at 10:20 AM Birger Koblitz <mail@birger-koblitz.de> wrote: > > Hi Martin, > > On 7/28/22 17:27, Martin Blumenstingl wrote: > > Your patch actually addresses an issue which I have seen with RTL_SPI_SFCSR_CS. > > Since you seem to have boards with these Realtek SoCs: could you > > please clean up your patch and upstream it (splitting into smaller > > patches if/where needed)? That would be a win-win: upstream gains > > improved SPI support and I won't be confused the next time I look at > > the spi-realtek-rtl driver. > > Thanks for suggesting this! I will send a patch-set later today along > these lines, I first need to set up a linux dev environment as the > development so far was within OpenWRT. There's not a single right or wrong. The fewer patches a target has in OpenWrt the easier it gets in my experience. The most simple approach in my opinion is to make OpenWrt use an external kernel tree (using CONFIG_EXTERNAL_KERNEL_TREE). Best regards, Martin
Hi Martin, Thanks for the tip on the build environment, so here it comes: This adds support for the RTL93xx newer generation of Switch SoCs from Realtek. It adds device flags to describe the difference in capabilities with respect to the RTL83xx Socs, support for more than CS#0, parallel IO and SPI bus frequency setting. Birger Koblitz (7): spi: realteak-rtl: Add support for RTL93xx SoCs spi: realtek-rtl: set device capability flags spi: realtek-rtl: allow use of chip-select other than CS0 spi: realtek-rtl: add parallel IO suppport spi: realtek-rtl: set transfer mode in transfer_one_message() spi: realtek-rtl: add support to configure bus speed spi: realtek-rtl: update devicetree documentation .../bindings/spi/realtek,rtl-spi.yaml | 10 + drivers/spi/spi-realtek-rtl.c | 196 ++++++++++++++---- 2 files changed, 162 insertions(+), 44 deletions(-)
diff --git a/drivers/spi/spi-realtek-rtl.c b/drivers/spi/spi-realtek-rtl.c index 866b0477dbd7..e5ad0f11996f 100644 --- a/drivers/spi/spi-realtek-rtl.c +++ b/drivers/spi/spi-realtek-rtl.c @@ -49,7 +49,7 @@ static void set_size(struct rtspi *rtspi, int size) u32 value; value = readl(REG(RTL_SPI_SFCSR)); - value &= RTL_SPI_SFCSR_LEN_MASK; + value &= ~RTL_SPI_SFCSR_LEN_MASK; if (size == 4) value |= RTL_SPI_SFCSR_LEN4; else if (size == 1) @@ -143,7 +143,7 @@ static void init_hw(struct rtspi *rtspi) /* Permanently disable CS1, since it's never used */ value |= RTL_SPI_SFCSR_CSB1; /* Select CS0 for use */ - value &= RTL_SPI_SFCSR_CS; + value &= ~RTL_SPI_SFCSR_CS; writel(value, REG(RTL_SPI_SFCSR)); }
The code seemingly tries to clear RTL_SPI_SFCSR_LEN_MASK (before then setting either RTL_SPI_SFCSR_LEN1 or RTL_SPI_SFCSR_LEN4) and RTL_SPI_SFCSR_CS. What it actually does is only keeping these bits and clearing all other bits, even the ones which were just set before. Fix the operation to clear the bits in the selected mask and keep all other ones. Fixes: a8af5cc2ff1e80 ("spi: realtek-rtl: Add support for Realtek RTL838x/RTL839x SPI controllers") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- I stumbled across this while reading the driver. This patch is untested because I don't have any hardware with this controller. drivers/spi/spi-realtek-rtl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)