diff mbox series

[2/3] ARM: dts: qcom-msm8660: Add GSBI3 I2C bus

Message ID 20220913131423.304804-2-linus.walleij@linaro.org
State Accepted
Commit 77012a11c36e4609f2c0e0ff0bf215a8448d9033
Headers show
Series [1/3] ARM: dts: qcom-msm8660: Add GSBI1 SPI bus | expand

Commit Message

Linus Walleij Sept. 13, 2022, 1:14 p.m. UTC 
GSBI3 can be used to enable an external I2C bus on e.g. the
APQ8060. On the DragonBoard APQ8060 this I2C bus is used to
talk to the Cypress CY8CTMA340 CYTTSP touchscreen.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/boot/dts/qcom-msm8660.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index 5640c02db852..f3131bee752e 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -156,6 +156,31 @@  gsbi1_spi: spi@16080000 {
 			};
 		};
 
+		gsbi3: gsbi@16200000 {
+			compatible = "qcom,gsbi-v1.0.0";
+			cell-index = <12>;
+			reg = <0x16200000 0x100>;
+			clocks = <&gcc GSBI3_H_CLK>;
+			clock-names = "iface";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			syscon-tcsr = <&tcsr>;
+			status = "disabled";
+
+			gsbi3_i2c: i2c@16280000 {
+				compatible = "qcom,i2c-qup-v1.1.1";
+				reg = <0x16280000 0x1000>;
+				interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&gcc GSBI3_QUP_CLK>, <&gcc GSBI3_H_CLK>;
+				clock-names = "core", "iface";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+		};
+
 		gsbi6: gsbi@16500000 {
 			compatible = "qcom,gsbi-v1.0.0";
 			cell-index = <12>;