From patchwork Thu Jan 5 04:25:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Daniel Kachhap X-Patchwork-Id: 6059 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 0374423E01 for ; Thu, 5 Jan 2012 04:27:31 +0000 (UTC) Received: from mail-ey0-f180.google.com (mail-ey0-f180.google.com [209.85.215.180]) by fiordland.canonical.com (Postfix) with ESMTP id EE6FEA18269 for ; Thu, 5 Jan 2012 04:27:30 +0000 (UTC) Received: by mail-ey0-f180.google.com with SMTP id c11so115813eaa.11 for ; Wed, 04 Jan 2012 20:27:30 -0800 (PST) Received: by 10.205.120.11 with SMTP id fw11mr161481bkc.89.1325737650801; Wed, 04 Jan 2012 20:27:30 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.205.82.144 with SMTP id ac16cs391025bkc; Wed, 4 Jan 2012 20:27:30 -0800 (PST) Received: by 10.50.153.133 with SMTP id vg5mr993910igb.8.1325737648439; Wed, 04 Jan 2012 20:27:28 -0800 (PST) Received: from mail-iy0-f178.google.com (mail-iy0-f178.google.com [209.85.210.178]) by mx.google.com with ESMTPS id g8si31551517ick.49.2012.01.04.20.27.27 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 04 Jan 2012 20:27:28 -0800 (PST) Received-SPF: pass (google.com: domain of amitdanielk@gmail.com designates 209.85.210.178 as permitted sender) client-ip=209.85.210.178; Authentication-Results: mx.google.com; spf=pass (google.com: domain of amitdanielk@gmail.com designates 209.85.210.178 as permitted sender) smtp.mail=amitdanielk@gmail.com; dkim=pass (test mode) header.i=@gmail.com Received: by mail-iy0-f178.google.com with SMTP id f6so340275iag.37 for ; Wed, 04 Jan 2012 20:27:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=i4rPtN7x2+cxr7VX8KNjvIeSvtuS6dzbUvUp7L51mhs=; b=hWxrMZe6tt6UeJdJl4jeNJHckWAQOJHJ+IPuo6siZS/xYDI1syeHyVwK1vvBRu95Q+ dXFYWzcRYf9EjtVUGvjtb41eYLN5USiDaDsuwnVgmygd6en2MzicZEPLQixZ1c40q5C2 xyu/w6cm/9vnqUrkVGxoJJI+4BOh8cD1qRAsg= Received: by 10.50.236.67 with SMTP id us3mr987689igc.14.1325737647765; Wed, 04 Jan 2012 20:27:27 -0800 (PST) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id rc7sm121098773igb.0.2012.01.04.20.27.25 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 04 Jan 2012 20:27:27 -0800 (PST) Sender: amit kachhap From: Amit Daniel Kachhap To: linux-samsung-soc@vger.kernel.org Cc: kgene.kim@samsung.com, linux-arm-kernel@lists.infradead.org, amit.kachhap@linaro.org, patches@linaro.org Subject: [PATCH V5 5/5] ARM: exynos: Enable l2 configuration through device tree Date: Thu, 5 Jan 2012 09:55:25 +0530 Message-Id: <1325737525-12869-6-git-send-email-amit.kachhap@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1325737525-12869-1-git-send-email-amit.kachhap@linaro.org> References: <1325737525-12869-1-git-send-email-amit.kachhap@linaro.org> This patch enables calling generic l2 setup functions if device tree is used. Signed-off-by: Amit Daniel Kachhap --- arch/arm/mach-exynos/common.c | 14 ++++++++++++-- 1 files changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index f8bb808..e91b92d 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -47,6 +47,8 @@ #include #include "common.h" +#define L2_AUX_VAL 0x7C470001 +#define L2_AUX_MASK 0xC200ffff static const char name_exynos4210[] = "EXYNOS4210"; static const char name_exynos4212[] = "EXYNOS4212"; @@ -453,6 +455,15 @@ core_initcall(exynos4_core_init); #ifdef CONFIG_CACHE_L2X0 static int __init exynos4_l2x0_cache_init(void) { +#ifdef CONFIG_OF + int ret; + ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); + if (!ret) { + l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); + clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); + return 0; + } +#endif if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) { l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC; /* TAG, Data Latency Control: 2 cycles */ @@ -486,8 +497,7 @@ static int __init exynos4_l2x0_cache_init(void) clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs)); } - l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff); - + l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK); return 0; }