From patchwork Fri Feb 19 05:19:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 62261 Delivered-To: patch@linaro.org Received: by 10.112.43.199 with SMTP id y7csp965821lbl; Thu, 18 Feb 2016 21:19:35 -0800 (PST) X-Received: by 10.66.235.9 with SMTP id ui9mr15594677pac.135.1455859175070; Thu, 18 Feb 2016 21:19:35 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a5si14111605pat.19.2016.02.18.21.19.34; Thu, 18 Feb 2016 21:19:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753088AbcBSFT3 (ORCPT + 6 others); Fri, 19 Feb 2016 00:19:29 -0500 Received: from mail-pf0-f172.google.com ([209.85.192.172]:35108 "EHLO mail-pf0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752838AbcBSFT0 (ORCPT ); Fri, 19 Feb 2016 00:19:26 -0500 Received: by mail-pf0-f172.google.com with SMTP id c10so46045800pfc.2 for ; Thu, 18 Feb 2016 21:19:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Dmhj3oTzwWV6V112acOBiMZwT/ZQZpHSmHVExDH92BI=; b=WPOe39eYHaGi9uNI5No6mxUqXjwTceTQxn/e8uZQQ94/lvAXPFndEzH84w7Hf1vvyb KA+YYwSXDlzrJMd+ZZz6GQm9BGn/qwea0mL6q8EgBLWA7aJ1O1/vwTgU+3eVLObiB3uP U6o+RuIbSKOL/BQ7aLWq8MBHGVZr7E+798vSI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Dmhj3oTzwWV6V112acOBiMZwT/ZQZpHSmHVExDH92BI=; b=ZLLOyowcFDf9doxx1ISWEI1AB2VKtHcV1Czbj4tQ+vfY8IIiSgkGb1jTOd94o+849A H3DuaCxm2s4/rIeRD6CKSBWfY3W6nPs8ALQEJv5S8hAffGFAXXExYGspv8RpxI1/YDhJ ak7EGxt+eaBWDMEkBTGxfiztvTBzVNdJPIxArubebMGBBRz0HYl1kpB0+wGwXpwH0vXM UbKFsfL/SjXsurEyxpNsDwivgLHP2KYnWAzbNFYThuGXkKewqiHOkSx2CQVdsw4eAJ4X y0LLC2UmQCPvCejqJ7oOV2nS2bdY9UEY7zuY0KW0qP+udCLMjw6QhUMIluBaWdw4MnVu d7Uw== X-Gm-Message-State: AG10YOR8hAQfBbUzr6/cit5+veOprL5FqD5QUfrtN1HImzI50y3j/HwQlKuiR82Lg4gG2Rx1 X-Received: by 10.98.16.150 with SMTP id 22mr15549451pfq.128.1455859166387; Thu, 18 Feb 2016 21:19:26 -0800 (PST) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([111.161.114.233]) by smtp.gmail.com with ESMTPSA id l62sm14215507pfj.7.2016.02.18.21.19.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Feb 2016 21:19:25 -0800 (PST) From: Guodong Xu To: xuwei5@hisilicon.com, mark.rutland@arm.com, robh@kernel.org, grant.likely@secretlab.ca Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kong.kongxinwei@hisilicon.com, Guodong Xu Subject: [PATCH 1/5] arm64: dts: hi6220: add pinctrl for uarts and enable them Date: Fri, 19 Feb 2016 13:19:04 +0800 Message-Id: <1455859148-29098-2-git-send-email-guodong.xu@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1455859148-29098-1-git-send-email-guodong.xu@linaro.org> References: <1455859148-29098-1-git-send-email-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add pinctrl for uart2 uart3 and uart4. Enable uart1 uart2 and uart3. Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 12 ++++++++++++ arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 9 +++++++++ 2 files changed, 21 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index e00e9ec..c4f560a 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -50,6 +50,18 @@ i2c1: i2c@f7101000 { status = "ok"; }; + + uart1: uart@f7111000 { + status = "ok"; + }; + + uart2: uart@f7112000 { + status = "ok"; + }; + + uart3: uart@f7113000 { + status = "ok"; + }; }; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index a7ca40b..6afd327 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -266,6 +266,8 @@ clocks = <&sys_ctrl HI6220_UART1_PCLK>, <&sys_ctrl HI6220_UART1_PCLK>; clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func1 &uart1_cfg_func2>; status = "disabled"; }; @@ -276,6 +278,8 @@ clocks = <&sys_ctrl HI6220_UART2_PCLK>, <&sys_ctrl HI6220_UART2_PCLK>; clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>; status = "disabled"; }; @@ -286,6 +290,9 @@ clocks = <&sys_ctrl HI6220_UART3_PCLK>, <&sys_ctrl HI6220_UART3_PCLK>; clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>; + status = "disabled"; }; uart4: uart@f7114000 { @@ -295,6 +302,8 @@ clocks = <&sys_ctrl HI6220_UART4_PCLK>, <&sys_ctrl HI6220_UART4_PCLK>; clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>; status = "disabled"; };