arm64: dts: qcom: sm8450: drop incorrect spi-max-frequency

spi-max-frequency is a property of SPI device, not the controller:

  qcom/sm8450-hdk.dtb: geniqup@8c0000: spi@880000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8450.dtsi | 7 -------
 1 file changed, 7 deletions(-)

On 10/11/2022 16:27, Krzysztof Kozlowski wrote:
> spi-max-frequency is a property of SPI device, not the controller:
>
>    qcom/sm8450-hdk.dtb: geniqup@8c0000: spi@880000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>


Konrad

>   arch/arm64/boot/dts/qcom/sm8450.dtsi | 7 -------
>   1 file changed, 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 9bdda0163573..e9f34c102a6f 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -794,7 +794,6 @@ spi15: spi@880000 {
>   				interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&qup_spi15_data_clk>, <&qup_spi15_cs>;
> -				spi-max-frequency = <50000000>;
>   				interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
>   						<&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
>   				interconnect-names = "qup-core", "qup-config";
> @@ -834,7 +833,6 @@ spi16: spi@884000 {
>   				interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&qup_spi16_data_clk>, <&qup_spi16_cs>;
> -				spi-max-frequency = <50000000>;
>   				interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
>   						<&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
>   				interconnect-names = "qup-core", "qup-config";
> @@ -874,7 +872,6 @@ spi17: spi@888000 {
>   				interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&qup_spi17_data_clk>, <&qup_spi17_cs>;
> -				spi-max-frequency = <50000000>;
>   				interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
>   						<&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
>   				interconnect-names = "qup-core", "qup-config";
> @@ -914,7 +911,6 @@ spi18: spi@88c000 {
>   				interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&qup_spi18_data_clk>, <&qup_spi18_cs>;
> -				spi-max-frequency = <50000000>;
>   				interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
>   						<&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
>   				interconnect-names = "qup-core", "qup-config";
> @@ -954,7 +950,6 @@ spi19: spi@890000 {
>   				interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&qup_spi19_data_clk>, <&qup_spi19_cs>;
> -				spi-max-frequency = <50000000>;
>   				interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
>   						<&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
>   				interconnect-names = "qup-core", "qup-config";
> @@ -1007,7 +1002,6 @@ spi20: spi@894000 {
>   				interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&qup_spi20_data_clk>, <&qup_spi20_cs>;
> -				spi-max-frequency = <50000000>;
>   				interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
>   						<&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
>   				interconnect-names = "qup-core", "qup-config";
> @@ -1047,7 +1041,6 @@ spi21: spi@898000 {
>   				interrupts = <GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&qup_spi21_data_clk>, <&qup_spi21_cs>;
> -				spi-max-frequency = <50000000>;
>   				interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
>   						<&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
>   				interconnect-names = "qup-core", "qup-config";

On Thu, 10 Nov 2022 16:27:41 +0100, Krzysztof Kozlowski wrote:
> spi-max-frequency is a property of SPI device, not the controller:
> 
>   qcom/sm8450-hdk.dtb: geniqup@8c0000: spi@880000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: sm8450: drop incorrect spi-max-frequency
      commit: b69e4bb48abdc5dd1fa6725dd1753f8abce3f38c

Best regards,