diff mbox series

[v3,01/14] RISC-V: fix funct4 definition for c.jalr in parse_asm.h

Message ID 20221130225614.1594256-2-heiko@sntech.de
State New
Headers show
Series Zbb string optimizations and call support in alternatives | expand

Commit Message

Heiko Stuebner Nov. 30, 2022, 10:56 p.m. UTC 
From: Heiko Stuebner <heiko.stuebner@vrull.eu>

The opcode definition for c.jalr is
    c.jalr c_rs1_n0  1..0=2 15..13=4 12=1 6..2=0

This means funct4 consisting of bit [15:12] is 1001b, so the value is 0x9.

Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
---
 arch/riscv/include/asm/parse_asm.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Andrew Jones Dec. 1, 2022, 5 p.m. UTC | #1 
On Wed, Nov 30, 2022 at 11:56:01PM +0100, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@vrull.eu>
> 
> The opcode definition for c.jalr is
>     c.jalr c_rs1_n0  1..0=2 15..13=4 12=1 6..2=0
> 
> This means funct4 consisting of bit [15:12] is 1001b, so the value is 0x9.

I presume kgdb c.jalr stepping was broken before this patch and, if so,
then we should add a comment stating that and also

  Fixes: edde5584c7ab ("riscv: Add SW single-step support for KDB")

and maybe to help keep me motivated :-)

  Reported-by: Andrew Jones <ajones@ventanamicro.com>

Thanks,
drew

> 
> Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
> ---
>  arch/riscv/include/asm/parse_asm.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/include/asm/parse_asm.h b/arch/riscv/include/asm/parse_asm.h
> index f36368de839f..7fee806805c1 100644
> --- a/arch/riscv/include/asm/parse_asm.h
> +++ b/arch/riscv/include/asm/parse_asm.h
> @@ -125,7 +125,7 @@
>  #define FUNCT3_C_J		0xa000
>  #define FUNCT3_C_JAL		0x2000
>  #define FUNCT4_C_JR		0x8000
> -#define FUNCT4_C_JALR		0xf000
> +#define FUNCT4_C_JALR		0x9000
>  
>  #define FUNCT12_SRET		0x10200000
>  
> -- 
> 2.35.1
>
Andrew Jones Dec. 1, 2022, 5:05 p.m. UTC | #2 
On Thu, Dec 01, 2022 at 06:00:23PM +0100, Andrew Jones wrote:
> On Wed, Nov 30, 2022 at 11:56:01PM +0100, Heiko Stuebner wrote:
> > From: Heiko Stuebner <heiko.stuebner@vrull.eu>
> > 
> > The opcode definition for c.jalr is
> >     c.jalr c_rs1_n0  1..0=2 15..13=4 12=1 6..2=0
> > 
> > This means funct4 consisting of bit [15:12] is 1001b, so the value is 0x9.
> 
> I presume kgdb c.jalr stepping was broken before this patch and, if so,
> then we should add a comment stating that and also
> 
>   Fixes: edde5584c7ab ("riscv: Add SW single-step support for KDB")
> 
> and maybe to help keep me motivated :-)
> 
>   Reported-by: Andrew Jones <ajones@ventanamicro.com>
>

Oh, and,

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

> Thanks,
> drew
> 
> > 
> > Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
> > ---
> >  arch/riscv/include/asm/parse_asm.h | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/arch/riscv/include/asm/parse_asm.h b/arch/riscv/include/asm/parse_asm.h
> > index f36368de839f..7fee806805c1 100644
> > --- a/arch/riscv/include/asm/parse_asm.h
> > +++ b/arch/riscv/include/asm/parse_asm.h
> > @@ -125,7 +125,7 @@
> >  #define FUNCT3_C_J		0xa000
> >  #define FUNCT3_C_JAL		0x2000
> >  #define FUNCT4_C_JR		0x8000
> > -#define FUNCT4_C_JALR		0xf000
> > +#define FUNCT4_C_JALR		0x9000
> >  
> >  #define FUNCT12_SRET		0x10200000
> >  
> > -- 
> > 2.35.1
> >
Heiko Stuebner Dec. 1, 2022, 5:07 p.m. UTC | #3 
Am Donnerstag, 1. Dezember 2022, 18:05:37 CET schrieb Andrew Jones:
> On Thu, Dec 01, 2022 at 06:00:23PM +0100, Andrew Jones wrote:
> > On Wed, Nov 30, 2022 at 11:56:01PM +0100, Heiko Stuebner wrote:
> > > From: Heiko Stuebner <heiko.stuebner@vrull.eu>
> > > 
> > > The opcode definition for c.jalr is
> > >     c.jalr c_rs1_n0  1..0=2 15..13=4 12=1 6..2=0
> > > 
> > > This means funct4 consisting of bit [15:12] is 1001b, so the value is 0x9.
> > 
> > I presume kgdb c.jalr stepping was broken before this patch and, if so,
> > then we should add a comment stating that and also
> > 
> >   Fixes: edde5584c7ab ("riscv: Add SW single-step support for KDB")
> > 
> > and maybe to help keep me motivated :-)
> > 
> >   Reported-by: Andrew Jones <ajones@ventanamicro.com>
> >
> 
> Oh, and,
> 
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

as I need another round for the purgatory thing anyway, I've added all 3
of the things above :-)

> > > Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
> > > ---
> > >  arch/riscv/include/asm/parse_asm.h | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/arch/riscv/include/asm/parse_asm.h b/arch/riscv/include/asm/parse_asm.h
> > > index f36368de839f..7fee806805c1 100644
> > > --- a/arch/riscv/include/asm/parse_asm.h
> > > +++ b/arch/riscv/include/asm/parse_asm.h
> > > @@ -125,7 +125,7 @@
> > >  #define FUNCT3_C_J		0xa000
> > >  #define FUNCT3_C_JAL		0x2000
> > >  #define FUNCT4_C_JR		0x8000
> > > -#define FUNCT4_C_JALR		0xf000
> > > +#define FUNCT4_C_JALR		0x9000
> > >  
> > >  #define FUNCT12_SRET		0x10200000
> > >  
>
diff mbox series

Patch

diff --git a/arch/riscv/include/asm/parse_asm.h b/arch/riscv/include/asm/parse_asm.h
index f36368de839f..7fee806805c1 100644
--- a/arch/riscv/include/asm/parse_asm.h
+++ b/arch/riscv/include/asm/parse_asm.h
@@ -125,7 +125,7 @@ 
 #define FUNCT3_C_J		0xa000
 #define FUNCT3_C_JAL		0x2000
 #define FUNCT4_C_JR		0x8000
-#define FUNCT4_C_JALR		0xf000
+#define FUNCT4_C_JALR		0x9000
 
 #define FUNCT12_SRET		0x10200000