diff mbox series

[01/12] dt-bindings: arm: msm: Update the maintainers for LLCC

Message ID 20221207135922.314827-2-manivannan.sadhasivam@linaro.org
State Superseded
Headers show
Series Qcom: LLCC/EDAC: Fix base address used for LLCC banks | expand

Commit Message

Manivannan Sadhasivam Dec. 7, 2022, 1:59 p.m. UTC
Rishabh Bhatnagar has left Qualcomm, and there is no evidence of him
maintaining with a new identity. So his entry needs to be removed.

Also, Sai Prakash Ranjan's email address should be updated to use
quicinc domain.

Cc: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Sai Prakash Ranjan Dec. 8, 2022, 3:15 a.m. UTC | #1
Hi Mani,

On 12/7/2022 7:29 PM, Manivannan Sadhasivam wrote:
> Rishabh Bhatnagar has left Qualcomm, and there is no evidence of him
> maintaining with a new identity. So his entry needs to be removed.
> 
> Also, Sai Prakash Ranjan's email address should be updated to use
> quicinc domain.
> 
> Cc: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>   Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
> index 38efcad56dbd..d1df49ffcc1b 100644
> --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
> +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
> @@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
>   title: Last Level Cache Controller
>   
>   maintainers:
> -  - Rishabh Bhatnagar <rishabhb@codeaurora.org>
> -  - Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
> +  - Sai Prakash Ranjan <quic_saipraka@quicinc.com>
>   

Thanks for updating, I believe you can add yourself as well now since
you maintain LLCC driver.

Either way,

Acked-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>


Thanks,
Sai
Manivannan Sadhasivam Dec. 12, 2022, 5:54 a.m. UTC | #2
Hi Sai,

On Thu, Dec 08, 2022 at 08:45:48AM +0530, Sai Prakash Ranjan wrote:
> Hi Mani,
> 
> On 12/7/2022 7:29 PM, Manivannan Sadhasivam wrote:
> > Rishabh Bhatnagar has left Qualcomm, and there is no evidence of him
> > maintaining with a new identity. So his entry needs to be removed.
> > 
> > Also, Sai Prakash Ranjan's email address should be updated to use
> > quicinc domain.
> > 
> > Cc: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > ---
> >   Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 3 +--
> >   1 file changed, 1 insertion(+), 2 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
> > index 38efcad56dbd..d1df49ffcc1b 100644
> > --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
> > +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
> > @@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
> >   title: Last Level Cache Controller
> >   maintainers:
> > -  - Rishabh Bhatnagar <rishabhb@codeaurora.org>
> > -  - Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
> > +  - Sai Prakash Ranjan <quic_saipraka@quicinc.com>
> 
> Thanks for updating, I believe you can add yourself as well now since
> you maintain LLCC driver.
> 

I only maintain the EDAC driver, so I'll leave llcc to you :)

> Either way,
> 
> Acked-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
> 

Thanks,
Mani

> 
> Thanks,
> Sai
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
index 38efcad56dbd..d1df49ffcc1b 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
@@ -7,8 +7,7 @@  $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Last Level Cache Controller
 
 maintainers:
-  - Rishabh Bhatnagar <rishabhb@codeaurora.org>
-  - Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
+  - Sai Prakash Ranjan <quic_saipraka@quicinc.com>
 
 description: |
   LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,