From patchwork Mon Feb 29 19:39:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Harkin X-Patchwork-Id: 63254 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp1434436lbc; Mon, 29 Feb 2016 11:39:42 -0800 (PST) X-Received: by 10.98.10.81 with SMTP id s78mr12157421pfi.119.1456774782374; Mon, 29 Feb 2016 11:39:42 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id qn15si44832170pab.22.2016.02.29.11.39.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Feb 2016 11:39:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 228E71A1E22; Mon, 29 Feb 2016 11:39:49 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-ob0-x232.google.com (mail-ob0-x232.google.com [IPv6:2607:f8b0:4003:c01::232]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id ECBCA1A1E1E for ; Mon, 29 Feb 2016 11:39:47 -0800 (PST) Received: by mail-ob0-x232.google.com with SMTP id ts10so144867693obc.1 for ; Mon, 29 Feb 2016 11:39:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:date:message-id:subject:from:to:cc; bh=PuM3QAycu1lzxgbObFMekg4X5tRRpq5iIWVH41p7IBA=; b=OZyPAdVXM+44b5bK8IpuIOv1VD71lE1RAB/vcDTc3xhN/4i/2vgbtTfGDbpGda+KZF cQf42w6s23raQiDNEk4Nt+o7L1acKjMtOE35G+JuiqnX8UCG4MckSrOIU/3qygxb1U90 XuF0Gxpfl7DrMvMaQPMWN+IVTMwPwpbiLPhVo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:date:message-id:subject:from:to:cc; bh=PuM3QAycu1lzxgbObFMekg4X5tRRpq5iIWVH41p7IBA=; b=bIZTwTpjG/gAdKV5DMmJak6/RDQUrMAmSzZ96AJpuZjBf81Ds6szooix7ESRvjC6lc 01vHCIeaMiDamTLuqx0J2noocOyKbw9/ovWA4WPqCUBLmC9y7F+fkBJ7PbTpT2EYeDzF nLpSH4ZHwBUHBK8fCh1BsxWTQt3F9F4qoMzSQa92/Xjsb8ws54IqUYcnKGOjYIKrj2aZ jloW2zLn7WEBxLajbO8M89fvsz7jrUy3yE90VbZ332BzXuKC/cmSg/ynCnsD3l8nDLEx TbKGNyUxbi89mUHuPN3HtVF4Qdl1OQq98bgM9xmEVghLfqI7Qu0vcDbEst0DBpqhFkKN 0k8w== X-Gm-Message-State: AD7BkJIszMogqYgDDZaSdGwGLIFCbtFgK9wFVua7I+T8ig0Fx1PJqsNHujYs2vyDyw9xAzu2wGcz99EZnxk/TnqH MIME-Version: 1.0 X-Received: by 10.182.126.198 with SMTP id na6mr12967437obb.3.1456774779703; Mon, 29 Feb 2016 11:39:39 -0800 (PST) Received: by 10.76.37.99 with HTTP; Mon, 29 Feb 2016 11:39:39 -0800 (PST) Date: Mon, 29 Feb 2016 19:39:39 +0000 Message-ID: From: Ryan Harkin To: Ard Biesheuvel , Leif Lindholm Cc: "edk2-devel@lists.01.org" , Linaro UEFI Mailman List Subject: [edk2] PL180MciDxe problem with TC2 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Hi Ard/Leif/anyone who cares, So I was trying to work out who broke MMC support in TC2 in the upstream EDK2 tree. It was difficult because the tree is borked on TC2 in so many interesting ways throughout history, but I eventually bisected down to this patch: 300fc77 2015-08-25 ArmPlatformPkg/PL180MciDxe: check PrimeCell ID before initializing [Ard Biesheuvel] Basically, TC2 reads 0x02 for MCI_PERIPH_ID_REG3, when, according to the spec, the register is supposed to read 0x00 in all cases. So the driver doesn't probe and is never initialised. I guess this is an FPGA bug in TC2? It's probably known about, but not to me ;-) Anyway, how to fix it?? We could mask off the "stuck" bit, we could not check ID_REG3, there are other things we could do. I decided to mask off the bit rather than discard the register check in my patch below, just to get things working But would you like to do? For extra point.... this was extra fun to track down due to other problems. TC2 stopped booting since this patch was submitted d340ef7 2014-08-26 ArmPkg/ArmArchTimerLib: Remove non required [depex] and IoLib [Olivier Martin] I've always carried a revert patch in my tree because I was previously told I was wrong and that it wasn't a problem, even though it clearly is. TC2 is spewing out a constant stream of this message: IRQ Exception PC at 0xBFB74C20 CPSR 0x60000133 It wasn't fixed until Ard's patch that broke MMC support. Ugh! I'm suspecting that the MMC support has a dependency on IoLib - for that is the part of the patch that broke TC2 in the first place. But I have yet to investigate that problem; I don't even know what IoLib is. So until this 2nd problem is fixed, I really don't want to submit a fix to the PL180 problem or I'll have a dead TC2 port again :-/ Cheers, Ryan. --- ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h | 3 +++ ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c | 26 +++++++++++++++++++++++++- 2 files changed, 28 insertions(+), 1 deletion(-) Handle = NULL; -- 2.5.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h index ce38a9e..8d36456 100644 --- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h +++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.h @@ -64,11 +64,14 @@ #define MCI_PERIPH_ID1 0x11 #define MCI_PERIPH_ID2 0x04 #define MCI_PERIPH_ID3 0x00 +#define MCI_PERIPH_ID3_TC2 0x02 #define MCI_PCELL_ID0 0x0D #define MCI_PCELL_ID1 0xF0 #define MCI_PCELL_ID2 0x05 #define MCI_PCELL_ID3 0xB1 +#define MCI_PERIPH_ID3_MASK (~0x02) + #define MCI_POWER_OFF 0 #define MCI_POWER_UP BIT1 #define MCI_POWER_ON (BIT1 | BIT0) diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c index 688cd8a..8ae88b3 100644 --- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c +++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c @@ -520,6 +520,14 @@ PL180MciDxeInitialize ( { EFI_STATUS Status; EFI_HANDLE Handle; + UINT8 r1 = MmioRead8 (MCI_PERIPH_ID_REG0); + UINT8 r2 = MmioRead8 (MCI_PERIPH_ID_REG1); + UINT8 r3 = MmioRead8 (MCI_PERIPH_ID_REG2); + UINT8 r4 = MmioRead8 (MCI_PERIPH_ID_REG3); + UINT8 r5 = MmioRead8 (MCI_PCELL_ID_REG0); + UINT8 r6 = MmioRead8 (MCI_PCELL_ID_REG1); + UINT8 r7 = MmioRead8 (MCI_PCELL_ID_REG2); + UINT8 r8 = MmioRead8 (MCI_PCELL_ID_REG3); DEBUG ((EFI_D_WARN, "Probing ID registers at 0x%lx for a PL180\n", MCI_PERIPH_ID_REG0)); @@ -528,14 +536,30 @@ PL180MciDxeInitialize ( if (MmioRead8 (MCI_PERIPH_ID_REG0) != MCI_PERIPH_ID0 || MmioRead8 (MCI_PERIPH_ID_REG1) != MCI_PERIPH_ID1 || MmioRead8 (MCI_PERIPH_ID_REG2) != MCI_PERIPH_ID2 || - MmioRead8 (MCI_PERIPH_ID_REG3) != MCI_PERIPH_ID3 || + (MmioRead8 (MCI_PERIPH_ID_REG3) & MCI_PERIPH_ID3_MASK) != MCI_PERIPH_ID3 || MmioRead8 (MCI_PCELL_ID_REG0) != MCI_PCELL_ID0 || MmioRead8 (MCI_PCELL_ID_REG1) != MCI_PCELL_ID1 || MmioRead8 (MCI_PCELL_ID_REG2) != MCI_PCELL_ID2 || MmioRead8 (MCI_PCELL_ID_REG3) != MCI_PCELL_ID3) { + DEBUG ((EFI_D_ERROR, "PL180MciDxeInitialize(): Failed to probe PL180\n")); + DEBUG ((EFI_D_ERROR, "PL180MciDxeInitialize(): want: %x,%x,%x,%x,%x,%x,%x,%x\n", + MCI_PERIPH_ID0, + MCI_PERIPH_ID1, + MCI_PERIPH_ID2, + MCI_PERIPH_ID3, + MCI_PCELL_ID0, + MCI_PCELL_ID1, + MCI_PCELL_ID2, + MCI_PCELL_ID3 + )); + + DEBUG ((EFI_D_ERROR, "PL180MciDxeInitialize(): read: %x,%x,%x,%x,%x,%x,%x,%x\n", r1, r2, r3, r4, r5, r6, r7, r8)); return EFI_NOT_FOUND; } + else { + DEBUG ((EFI_D_ERROR, "PL180MciDxeInitialize(): Probe succeeded\n")); + }