diff mbox series

[v3,2/2] dt-bindings: mailbox: add Marvell MHU

Message ID 20230113125323.3744-3-wzmuda@marvell.com
State New
Headers show
Series Add support for Marvell MHU on OcteonTX and OcteonTX2 | expand

Commit Message

Wojciech Zmuda Jan. 13, 2023, 12:53 p.m. UTC 
Marvell Message Handling Unit is a mailbox controller present in
Marvell OcteonTx and OcteonTX2 SoC family.

Signed-off-by: Wojciech Zmuda <wzmuda@marvell.com>
---
 .../bindings/mailbox/marvell,mhu.yml          | 59 +++++++++++++++++++
 MAINTAINERS                                   |  1 +
 2 files changed, 60 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/marvell,mhu.yml
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/mailbox/marvell,mhu.yml b/Documentation/devicetree/bindings/mailbox/marvell,mhu.yml
new file mode 100644
index 000000000000..3fe8238eefe7
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/marvell,mhu.yml
@@ -0,0 +1,59 @@ 
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mailbox/marvell,mhu.yml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Marvell Message Handling Unit
+
+maintainers:
+  - Sujeet Baranwal <sbaranwal@marvell.com>
+  - Sunil Goutham <sgoutham@marvell.com>
+  - Wojciech Bartczak <wbartczak@marvell.com>
+
+description:
+  The Control-Processors Cluster (CPC) provides Arm-platform specification
+  entities for managing the system. One of the CPC processors is the System
+  Control Processor (SCP). The SCP is responsible, among others, for booting
+  the chip, clock and power initialization, controlling power consumption
+  through DVFS, monitoring temperature sensors and controlling AVS. The SCP,
+  as each XCP, contains mailboxes for software-to-software communications.
+  Mailbox writes cause an interrupt to the local XCP core or to the AP.
+  This driver exposes AP-SCP Message Handling Unit to the system, providing
+  the mailbox communication mechanism to the system, with the intention
+  of plugging into the SCMI framework. It is designed to work with Marvell
+  OcteonTX and OcteonTX2-based platforms.
+  Mailbox has no other usage than SCMI communication. In case of
+  configurations running without SCMI support it should be disabled.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+        - enum:
+          - marvell,octeontx-mhu
+          - marvell,octeontx2-mhu
+
+  reg:
+    maxItems: 1
+
+  "#mbox-cells":
+    description: Index of the channel
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - "#mbox-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    / {
+        mailbox: mailbox {
+            compatible = "marvell,octeontx2-mhu";
+            reg = <0xe000 0 0 0 0>; /* DEVFN = 0xe0 (1c:0) */
+            #mbox-cells = <1>;
+    };
+
diff --git a/MAINTAINERS b/MAINTAINERS
index 57db5055cdd6..685bdb2c1735 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11328,6 +11328,7 @@  M:	Sunil Goutham <sgoutham@marvell.com>
 M:	Wojciech Bartczak <wbartczak@marvell.com>
 L:	linux-kernel@vger.kernel.org
 S:	Maintained
+F:	Documentation/devicetree/bindings/mailbox/marvell,mhu.yml
 F:	drivers/mailbox/marvell_mhu.c
 
 MATROX FRAMEBUFFER DRIVER