From patchwork Thu Mar 24 13:32:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 64359 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp648993lbc; Thu, 24 Mar 2016 06:33:42 -0700 (PDT) X-Received: by 10.28.179.7 with SMTP id c7mr11189243wmf.46.1458826422638; Thu, 24 Mar 2016 06:33:42 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id da7si9050869wjb.185.2016.03.24.06.33.42; Thu, 24 Mar 2016 06:33:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 701CBA7670; Thu, 24 Mar 2016 14:33:09 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8NRfk5ZH7CJF; Thu, 24 Mar 2016 14:33:09 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DEC0FA7631; Thu, 24 Mar 2016 14:33:04 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D7E33A7506 for ; Thu, 24 Mar 2016 14:32:24 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ESFvlmRk4o85 for ; Thu, 24 Mar 2016 14:32:24 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg010-v.nifty.com (conuserg010.nifty.com [202.248.44.36]) by theia.denx.de (Postfix) with ESMTPS id 0B56CA7531 for ; Thu, 24 Mar 2016 14:32:19 +0100 (CET) Received: from beagle.diag.org (p14090-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.90]) (authenticated) by conuserg010-v.nifty.com with ESMTP id u2ODW5nM018160; Thu, 24 Mar 2016 22:32:10 +0900 X-Nifty-SrcIP: [153.142.97.90] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Thu, 24 Mar 2016 22:32:45 +0900 Message-Id: <1458826368-2159-9-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1458826368-2159-1-git-send-email-yamada.masahiro@socionext.com> References: <1458826368-2159-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 08/10] pinctrl: uniphier: support per-pin input enable quirk for new SoCs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Upcoming new pinctrl drivers of PH1-LD11/LD20 support input signal gating for each pin. (While, existing ones only support it per pin group.) This commit prepares the core part for that. Signed-off-by: Masahiro Yamada --- drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 28 +++++++++++++++++++++++- drivers/pinctrl/uniphier/pinctrl-uniphier.h | 2 ++ 2 files changed, 29 insertions(+), 1 deletion(-) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c index 7a6c95c..5e7ff02 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -44,7 +44,23 @@ static const char *uniphier_pinmux_get_function_name(struct udevice *dev, return priv->socdata->functions[selector]; } -static void uniphier_pinconf_input_enable(struct udevice *dev, unsigned pin) +static void uniphier_pinconf_input_enable_perpin(struct udevice *dev, + unsigned pin) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + unsigned reg; + u32 mask, tmp; + + reg = UNIPHIER_PINCTRL_IECTRL + pin / 32 * 4; + mask = BIT(pin % 32); + + tmp = readl(priv->base + reg); + tmp |= mask; + writel(tmp, priv->base + reg); +} + +static void uniphier_pinconf_input_enable_legacy(struct udevice *dev, + unsigned pin) { struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); int pins_count = priv->socdata->pins_count; @@ -64,6 +80,16 @@ static void uniphier_pinconf_input_enable(struct udevice *dev, unsigned pin) } } +static void uniphier_pinconf_input_enable(struct udevice *dev, unsigned pin) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + + if (priv->socdata->quirks & UNIPHIER_PINCTRL_PERPIN_IECTRL) + uniphier_pinconf_input_enable_perpin(dev, pin); + else + uniphier_pinconf_input_enable_legacy(dev, pin); +} + static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin, unsigned muxval) { diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h index e622d93..0134d06 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -7,6 +7,7 @@ #ifndef __PINCTRL_UNIPHIER_H__ #define __PINCTRL_UNIPHIER_H__ +#include #include #include #include @@ -69,6 +70,7 @@ struct uniphier_pinctrl_socdata { const char * const *functions; int functions_count; unsigned quirks; +#define UNIPHIER_PINCTRL_PERPIN_IECTRL BIT(1) #define UNIPHIER_PINCTRL_DBGMUX_SEPARATE BIT(0) };