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[PULL,120/126] hw/ide/pci: Add PCIIDEState::isa_irq[]

Message ID 20230227140213.35084-111-philmd@linaro.org
State Accepted
Commit 7ae8e6c9a21bff7db376a8b1b135dffa0bb920d6
Headers show
Series None | expand

Commit Message

Philippe Mathieu-Daudé Feb. 27, 2023, 2:02 p.m. UTC 
From: Bernhard Beschow <shentey@gmail.com>

These legacy ISA IRQs allow the PIIX IDE functions to be wired up in
their south bridges and the VIA IDE functions to disuse
PCI_INTERRUPT_LINE as outlined in https://lists.nongnu.org/archive/html/qemu-devel/2020-03/msg01707.html

Suggested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230126211740.66874-7-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/ide/pci.h | 1 +
 1 file changed, 1 insertion(+)
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Patch

diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h
index 7b5e3f6e1c..74c127e32f 100644
--- a/include/hw/ide/pci.h
+++ b/include/hw/ide/pci.h
@@ -49,6 +49,7 @@  struct PCIIDEState {
 
     IDEBus bus[2];
     BMDMAState bmdma[2];
+    qemu_irq isa_irq[2];
     uint32_t secondary; /* used only for cmd646 */
     MemoryRegion bmdma_bar;
     MemoryRegion cmd_bar[2];