From patchwork Tue Apr 26 17:22:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Paul E. McKenney" X-Patchwork-Id: 66709 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp1737747qge; Tue, 26 Apr 2016 10:22:13 -0700 (PDT) X-Received: by 10.98.109.197 with SMTP id i188mr5348154pfc.88.1461691333057; Tue, 26 Apr 2016 10:22:13 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z6si2150333pas.133.2016.04.26.10.22.12; Tue, 26 Apr 2016 10:22:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752796AbcDZRWA (ORCPT + 29 others); Tue, 26 Apr 2016 13:22:00 -0400 Received: from e33.co.us.ibm.com ([32.97.110.151]:36496 "EHLO e33.co.us.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752744AbcDZRVj (ORCPT ); Tue, 26 Apr 2016 13:21:39 -0400 Received: from localhost by e33.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 26 Apr 2016 11:21:38 -0600 Received: from d03dlp02.boulder.ibm.com (9.17.202.178) by e33.co.us.ibm.com (192.168.1.133) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Tue, 26 Apr 2016 11:21:36 -0600 X-IBM-Helo: d03dlp02.boulder.ibm.com X-IBM-MailFrom: paulmck@linux.vnet.ibm.com X-IBM-RcptTo: linux-doc@vger.kernel.org;linux-kernel@vger.kernel.org Received: from b01cxnp23034.gho.pok.ibm.com (b01cxnp23034.gho.pok.ibm.com [9.57.198.29]) by d03dlp02.boulder.ibm.com (Postfix) with ESMTP id 7F68D3E40044; Tue, 26 Apr 2016 11:21:35 -0600 (MDT) Received: from d01av01.pok.ibm.com (d01av01.pok.ibm.com [9.56.224.215]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u3QHLZPo34996396; Tue, 26 Apr 2016 17:21:35 GMT Received: from d01av01.pok.ibm.com (localhost [127.0.0.1]) by d01av01.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id u3QHLXqM016153; Tue, 26 Apr 2016 13:21:34 -0400 Received: from paulmck-ThinkPad-W541 ([9.70.82.191]) by d01av01.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id u3QHLX27016112; Tue, 26 Apr 2016 13:21:33 -0400 Received: by paulmck-ThinkPad-W541 (Postfix, from userid 1000) id DEDE516C05D6; Tue, 26 Apr 2016 10:22:10 -0700 (PDT) From: "Paul E. McKenney" To: linux-kernel@vger.kernel.org Cc: mingo@kernel.org, corbet@lwn.net, peterz@infradead.org, linux-doc@vger.kernel.org, dhowells@redhat.com, will.deacon@arm.com, dave@stgolabs.net, "Paul E. McKenney" Subject: [PATCH locking 3/4] documentation: ACQUIRE applies to loads, RELEASE applies to stores Date: Tue, 26 Apr 2016 10:22:07 -0700 Message-Id: <1461691328-5429-3-git-send-email-paulmck@linux.vnet.ibm.com> X-Mailer: git-send-email 2.5.2 In-Reply-To: <20160426172041.GA4539@linux.vnet.ibm.com> References: <20160426172041.GA4539@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16042617-0009-0000-0000-000027864DF4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Will Deacon For compound atomics performing both a load and a store operation, make it clear that _acquire and _release variants refer only to the load and store portions of compound atomic. For example, xchg_acquire is an xchg operation where the load takes on ACQUIRE semantics. Cc: Paul E. McKenney Cc: Peter Zijlstra Signed-off-by: Will Deacon Acked-by: Peter Zijlstra (Intel) Signed-off-by: Paul E. McKenney --- Documentation/memory-barriers.txt | 5 +++++ 1 file changed, 5 insertions(+) -- 2.5.2 diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 8b11e54238bf..147ae8ec836f 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -498,6 +498,11 @@ And a couple of implicit varieties: This means that ACQUIRE acts as a minimal "acquire" operation and RELEASE acts as a minimal "release" operation. +A subset of the atomic operations described in atomic_ops.txt have ACQUIRE +and RELEASE variants in addition to fully-ordered and relaxed (no barrier +semantics) definitions. For compound atomics performing both a load and a +store, ACQUIRE semantics apply only to the load and RELEASE semantics apply +only to the store portion of the operation. Memory barriers are only required where there's a possibility of interaction between two CPUs or between a CPU and a device. If it can be guaranteed that