[Linaro-uefi,v2,1/2] Platforms/AMD/Styx: implement PciHostBridgeLib

Message ID 1461830079-14698-2-git-send-email-ard.biesheuvel@linaro.org
State New
Headers show

Commit Message

Ard Biesheuvel April 28, 2016, 7:54 a.m.
In preparation of moving to the generic implementation of PciHostBridgeDxe,
supply an implementation of PciHostBridgeLib that encapsulates the platform
specific parameters that describe the PCI host bridge.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc                                   |  16 ++
 Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.c   | 196 ++++++++++++++++++++
 Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.inf |  55 ++++++
 Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc                           |  16 ++
 4 files changed, 283 insertions(+)

Patch

diff --git a/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc b/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc
index 599e259c464f..3b2e7d4269d9 100644
--- a/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc
+++ b/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc
@@ -476,6 +476,22 @@  DEFINE TRANS_CODE = $(EL3_TO_EL2)
   # PCIe Support
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000
 
+  gArmPlatformTokenSpaceGuid.PcdPciBusMin|0x0
+  gArmPlatformTokenSpaceGuid.PcdPciBusMax|0xFF
+
+  gArmPlatformTokenSpaceGuid.PcdPciIoBase|0x0
+  gArmPlatformTokenSpaceGuid.PcdPciIoSize|0x10000
+  gArmPlatformTokenSpaceGuid.PcdPciIoTranslation|0xEFFF0000
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
+
+  gArmPlatformTokenSpaceGuid.PcdPciMmio32Base|0x40000000
+  gArmPlatformTokenSpaceGuid.PcdPciMmio32Size|0x80000000
+  gArmPlatformTokenSpaceGuid.PcdPciMmio32Translation|0x0
+
+  gArmPlatformTokenSpaceGuid.PcdPciMmio64Base|0x100000000
+  gArmPlatformTokenSpaceGuid.PcdPciMmio64Size|0x7F00000000
+  gArmPlatformTokenSpaceGuid.PcdPciMmio64Translation|0x0
+
   ## Use PCI emulation for ATA PassThru
   gEfiMdeModulePkgTokenSpaceGuid.PcdAtaPassThruPciEmulation|TRUE
 
diff --git a/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.c b/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.c
new file mode 100644
index 000000000000..432e4230a59b
--- /dev/null
+++ b/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.c
@@ -0,0 +1,196 @@ 
+/** @file
+  PCI Host Bridge Library instance for AMD Seattle SOC
+
+  Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+
+  This program and the accompanying materials are licensed and made available
+  under the terms and conditions of the BSD License which accompanies this
+  distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php.
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
+  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+#include <PiDxe.h>
+#include <Library/PciHostBridgeLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+
+#include <Protocol/PciRootBridgeIo.h>
+#include <Protocol/PciHostBridgeResourceAllocation.h>
+
+#pragma pack(1)
+typedef struct {
+  ACPI_HID_DEVICE_PATH     AcpiDevicePath;
+  EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
+#pragma pack ()
+
+STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath = {
+  {
+    {
+      ACPI_DEVICE_PATH,
+      ACPI_DP,
+      {
+        (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
+        (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
+      }
+    },
+    EISA_PNP_ID(0x0A08), // PCI Express
+    0
+  },
+
+  {
+    END_DEVICE_PATH_TYPE,
+    END_ENTIRE_DEVICE_PATH_SUBTYPE,
+    {
+      END_DEVICE_PATH_LENGTH,
+      0
+    }
+  }
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED
+CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
+  L"Mem", L"I/O", L"Bus"
+};
+
+/**
+  Return all the root bridge instances in an array.
+
+  @param Count  Return the count of root bridge instances.
+
+  @return All the root bridge instances in an array.
+          The array should be passed into PciHostBridgeFreeRootBridges()
+          when it's not used.
+**/
+PCI_ROOT_BRIDGE *
+EFIAPI
+PciHostBridgeGetRootBridges (
+  UINTN *Count
+  )
+{
+  PCI_ROOT_BRIDGE     *RootBridge;
+
+  *Count = 1;
+  RootBridge = AllocateZeroPool (*Count * sizeof *RootBridge);
+
+  RootBridge->Segment     = 0;
+
+  RootBridge->Supports    = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |
+                            EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
+                            EFI_PCI_ATTRIBUTE_ISA_IO_16 |
+                            EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
+                            EFI_PCI_ATTRIBUTE_VGA_MEMORY |
+                            EFI_PCI_ATTRIBUTE_VGA_IO_16  |
+                            EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
+  RootBridge->Attributes  = RootBridge->Supports;
+
+  RootBridge->DmaAbove4G  = TRUE;
+
+  RootBridge->AllocationAttributes  = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM |
+                                      EFI_PCI_HOST_BRIDGE_MEM64_DECODE ;
+
+  RootBridge->Bus.Base              = PcdGet32 (PcdPciBusMin);
+  RootBridge->Bus.Limit             = PcdGet32 (PcdPciBusMax);
+  RootBridge->Io.Base               = PcdGet64 (PcdPciIoBase);
+  RootBridge->Io.Limit              = PcdGet64 (PcdPciIoBase) + PcdGet64 (PcdPciIoSize) - 1;
+  RootBridge->Mem.Base              = PcdGet32 (PcdPciMmio32Base);
+  RootBridge->Mem.Limit             = PcdGet32 (PcdPciMmio32Base) + PcdGet32 (PcdPciMmio32Size) - 1;
+  RootBridge->MemAbove4G.Base       = PcdGet64 (PcdPciMmio64Base);
+  RootBridge->MemAbove4G.Limit      = PcdGet64 (PcdPciMmio64Base) + PcdGet64 (PcdPciMmio64Size) - 1;
+
+  //
+  // No separate ranges for prefetchable and non-prefetchable BARs
+  //
+  RootBridge->PMem.Base             = 0;
+  RootBridge->PMem.Limit            = 0;
+  RootBridge->PMemAbove4G.Base      = 0;
+  RootBridge->PMemAbove4G.Limit     = 0;
+
+  ASSERT (FixedPcdGet64 (PcdPciMmio32Translation) == 0);
+  ASSERT (FixedPcdGet64 (PcdPciMmio64Translation) == 0);
+
+  RootBridge->NoExtendedConfigSpace = FALSE;
+
+  RootBridge->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath;
+
+  return RootBridge;
+}
+
+/**
+  Free the root bridge instances array returned from PciHostBridgeGetRootBridges().
+
+  @param Bridges The root bridge instances array.
+  @param Count   The count of the array.
+**/
+VOID
+EFIAPI
+PciHostBridgeFreeRootBridges (
+  PCI_ROOT_BRIDGE *Bridges,
+  UINTN           Count
+  )
+{
+  FreePool (Bridges);
+}
+
+/**
+  Inform the platform that the resource conflict happens.
+
+  @param HostBridgeHandle Handle of the Host Bridge.
+  @param Configuration    Pointer to PCI I/O and PCI memory resource
+                          descriptors. The Configuration contains the resources
+                          for all the root bridges. The resource for each root
+                          bridge is terminated with END descriptor and an
+                          additional END is appended indicating the end of the
+                          entire resources. The resource descriptor field
+                          values follow the description in
+                          EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
+                          .SubmitResources().
+**/
+VOID
+EFIAPI
+PciHostBridgeResourceConflict (
+  EFI_HANDLE                        HostBridgeHandle,
+  VOID                              *Configuration
+  )
+{
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
+  UINTN                             RootBridgeIndex;
+  DEBUG ((EFI_D_ERROR, "PciHostBridge: Resource conflict happens!\n"));
+
+  RootBridgeIndex = 0;
+  Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
+  while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
+    DEBUG ((EFI_D_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
+    for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
+      ASSERT (Descriptor->ResType <
+              (sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /
+               sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])
+               )
+              );
+      DEBUG ((EFI_D_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
+              mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
+              Descriptor->AddrLen, Descriptor->AddrRangeMax
+              ));
+      if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
+        DEBUG ((EFI_D_ERROR, "     Granularity/SpecificFlag = %ld / %02x%s\n",
+                Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
+                ((Descriptor->SpecificFlag &
+                  EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
+                  ) != 0) ? L" (Prefetchable)" : L""
+                ));
+      }
+    }
+    //
+    // Skip the END descriptor for root bridge
+    //
+    ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
+    Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
+                   (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
+                   );
+  }
+}
diff --git a/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.inf b/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.inf
new file mode 100644
index 000000000000..d73017c00b48
--- /dev/null
+++ b/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/AmdStyxPciHostBridgeLib.inf
@@ -0,0 +1,55 @@ 
+## @file
+#  PCI Host Bridge Library instance for AMD Seattle SOC
+#
+#  Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution. The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+#  IMPLIED.
+#
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = AmdStyxPciHostBridgeLib
+  FILE_GUID                      = 05E7AB83-EF8D-482D-80F8-905B73377A15
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = PciHostBridgeLib
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES           = AARCH64
+#
+
+[Sources]
+  AmdStyxPciHostBridgeLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  DevicePathLib
+  MemoryAllocationLib
+
+[FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdPciBusMin
+  gArmPlatformTokenSpaceGuid.PcdPciBusMax
+  gArmPlatformTokenSpaceGuid.PcdPciIoBase
+  gArmPlatformTokenSpaceGuid.PcdPciIoSize
+  gArmPlatformTokenSpaceGuid.PcdPciMmio32Base
+  gArmPlatformTokenSpaceGuid.PcdPciMmio32Size
+  gArmPlatformTokenSpaceGuid.PcdPciMmio32Translation
+  gArmPlatformTokenSpaceGuid.PcdPciMmio64Base
+  gArmPlatformTokenSpaceGuid.PcdPciMmio64Size
+  gArmPlatformTokenSpaceGuid.PcdPciMmio64Translation
diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
index cd0fe296d849..7719c42bbc70 100644
--- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
@@ -477,6 +477,22 @@  DEFINE TRANS_CODE = $(EL3_TO_EL2)
   # PCIe Support
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000
 
+  gArmPlatformTokenSpaceGuid.PcdPciBusMin|0x0
+  gArmPlatformTokenSpaceGuid.PcdPciBusMax|0xFF
+
+  gArmPlatformTokenSpaceGuid.PcdPciIoBase|0x0
+  gArmPlatformTokenSpaceGuid.PcdPciIoSize|0x10000
+  gArmPlatformTokenSpaceGuid.PcdPciIoTranslation|0xEFFF0000
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
+
+  gArmPlatformTokenSpaceGuid.PcdPciMmio32Base|0x40000000
+  gArmPlatformTokenSpaceGuid.PcdPciMmio32Size|0x80000000
+  gArmPlatformTokenSpaceGuid.PcdPciMmio32Translation|0x0
+
+  gArmPlatformTokenSpaceGuid.PcdPciMmio64Base|0x100000000
+  gArmPlatformTokenSpaceGuid.PcdPciMmio64Size|0x7F00000000
+  gArmPlatformTokenSpaceGuid.PcdPciMmio64Translation|0x0
+
   ## Use PCI emulation for ATA PassThru
   gEfiMdeModulePkgTokenSpaceGuid.PcdAtaPassThruPciEmulation|TRUE