From patchwork Thu Apr 28 08:15:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Auger Eric X-Patchwork-Id: 66860 Delivered-To: patches@linaro.org Received: by 10.140.93.198 with SMTP id d64csp75495qge; Thu, 28 Apr 2016 01:15:38 -0700 (PDT) X-Received: by 10.28.45.216 with SMTP id t207mr14349769wmt.40.1461831336895; Thu, 28 Apr 2016 01:15:36 -0700 (PDT) Return-Path: Received: from mail-wm0-x22a.google.com (mail-wm0-x22a.google.com. [2a00:1450:400c:c09::22a]) by mx.google.com with ESMTPS id ib5si9285679wjb.222.2016.04.28.01.15.36 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Apr 2016 01:15:36 -0700 (PDT) Received-SPF: pass (google.com: domain of eric.auger@linaro.org designates 2a00:1450:400c:c09::22a as permitted sender) client-ip=2a00:1450:400c:c09::22a; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of eric.auger@linaro.org designates 2a00:1450:400c:c09::22a as permitted sender) smtp.mailfrom=eric.auger@linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by mail-wm0-x22a.google.com with SMTP id e201so66860088wme.0 for ; Thu, 28 Apr 2016 01:15:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fM6Akdk7IP0VZTdAd5hWXNvztJbfa8UfrSZudx4WGPc=; b=FqtP+y5A8od3sYbxwBkSVXMvJczuCb/XEcFoXP6ik/a9vyG8/gr0ldX2nA/Kn3Q6Rd p+FoFrPkjRDIQhaW5qQxjGxgg2kyukaoboPI7ybpeeFjJfYPCegEuuxG9pLn/7PTUMzP H1Ydnrw7By40nznu/8SMA6dOe8oomhqCCrn4I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fM6Akdk7IP0VZTdAd5hWXNvztJbfa8UfrSZudx4WGPc=; b=ce+odQWJmk5J4x92QPUco6Q8aevXY0f8kVKflamyTcCdiCuRc7PDpv9JcQ/xGrLvgq Yer8XnhhhiHpa8P6/v+8yDJvX6ggICUygsU0m5wLzI7hcRGi+uC95kQ2y2LqTgeunLST u5cP/PpOo9EYpiQUX+w7KgIx/6vT/0p3N4nsdYSCiIeZtbfxzZfbbPJ124j+bgB5e1J2 17GypdkuJC3IY5M7BQn8AVO9DlwsMf2FQOGQgjN/RahBJlmJqXsujtTzfG8z8GXHos7X Hou0vXAYzxMuN0DBnnF+DK7dL3OoHNDP82S9Rq6XFzkRbCFj6urY1IHjuoMzEo3mDx6V N3gA== X-Gm-Message-State: AOPr4FVax61RrpmrQ3F6AIQOBAuXsNoJAFmUpgoSPGA8c87CEeK+8YLNOnnbH+msxQewFn89hsE= X-Received: by 10.194.0.113 with SMTP id 17mr13844305wjd.128.1461831336656; Thu, 28 Apr 2016 01:15:36 -0700 (PDT) Return-Path: Received: from new-host-46.home (LMontsouris-657-1-37-90.w80-11.abo.wanadoo.fr. [80.11.198.90]) by smtp.gmail.com with ESMTPSA id h8sm12749860wmd.2.2016.04.28.01.15.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 28 Apr 2016 01:15:35 -0700 (PDT) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, robin.murphy@arm.com, alex.williamson@redhat.com, will.deacon@arm.com, joro@8bytes.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, christoffer.dall@linaro.org, linux-arm-kernel@lists.infradead.org Cc: patches@linaro.org, linux-kernel@vger.kernel.org, Bharat.Bhushan@freescale.com, pranav.sawargaonkar@gmail.com, p.fedin@samsung.com, iommu@lists.linux-foundation.org, Jean-Philippe.Brucker@arm.com, julien.grall@arm.com Subject: [PATCH v8 2/8] iommu/arm-smmu: sets the MSI geometry to programmable Date: Thu, 28 Apr 2016 08:15:17 +0000 Message-Id: <1461831323-5480-3-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461831323-5480-1-git-send-email-eric.auger@linaro.org> References: <1461831323-5480-1-git-send-email-eric.auger@linaro.org> On ARM, MSI write transactions from device upstream to the smmu are conveyed through the iommu. Therefore target physical addresses must be mapped and DOMAIN_ATTR_MSI_GEOMETRY advertises a programmable MSI IOVA region. Signed-off-by: Eric Auger --- v7 -> v8: - use DOMAIN_ATTR_MSI_GEOMETRY v4 -> v5: - don't handle fsl_pamu_domain anymore - handle arm-smmu-v3 --- drivers/iommu/arm-smmu-v3.c | 2 ++ drivers/iommu/arm-smmu.c | 3 +++ 2 files changed, 5 insertions(+) -- 1.9.1 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 4ff73ff..bf222b5 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1396,6 +1396,7 @@ static bool arm_smmu_capable(enum iommu_cap cap) static struct iommu_domain *arm_smmu_domain_alloc(unsigned type) { struct arm_smmu_domain *smmu_domain; + struct iommu_domain_msi_geometry msi_geometry = {0, 0, true}; if (type != IOMMU_DOMAIN_UNMANAGED && type != IOMMU_DOMAIN_DMA) return NULL; @@ -1414,6 +1415,7 @@ static struct iommu_domain *arm_smmu_domain_alloc(unsigned type) kfree(smmu_domain); return NULL; } + smmu_domain->domain.msi_geometry = msi_geometry; mutex_init(&smmu_domain->init_mutex); spin_lock_init(&smmu_domain->pgtbl_lock); diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 7c39ac4..55f429d 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -976,6 +976,7 @@ static void arm_smmu_destroy_domain_context(struct iommu_domain *domain) static struct iommu_domain *arm_smmu_domain_alloc(unsigned type) { struct arm_smmu_domain *smmu_domain; + struct iommu_domain_msi_geometry msi_geometry = {0, 0, true}; if (type != IOMMU_DOMAIN_UNMANAGED && type != IOMMU_DOMAIN_DMA) return NULL; @@ -994,6 +995,8 @@ static struct iommu_domain *arm_smmu_domain_alloc(unsigned type) return NULL; } + smmu_domain->domain.msi_geometry = msi_geometry; + mutex_init(&smmu_domain->init_mutex); spin_lock_init(&smmu_domain->pgtbl_lock);