| Message ID | 20230404190115.546973-3-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted |
| Commit | 1ca60781e387df1ca753117e2507eaf154057ff8 |
| Headers | show |
| Series | None | expand |
diff --git a/Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml b/Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml index 738c92bb7518..854e554eae67 100644 --- a/Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml +++ b/Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml @@ -34,11 +34,6 @@ properties: Three input clocks referring to left input reference clock, refclk and right input reference clock. - assigned-clocks: - $ref: "/schemas/types.yaml#/definitions/phandle-array" - assigned-clock-parents: - $ref: "/schemas/types.yaml#/definitions/phandle-array" - '#phy-cells': const: 2 description:
The meta schema from DT schema already defines assigned-clocks, so there is no need for device schema to mention it at all. The specific parenting of the first input and output clock is apparently important, thus keep them as required, but without defining type. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- .../devicetree/bindings/phy/ti,phy-am654-serdes.yaml | 5 ----- 1 file changed, 5 deletions(-)