From patchwork Mon May 2 13:35:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 67032 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp47655qge; Mon, 2 May 2016 06:38:05 -0700 (PDT) X-Received: by 10.50.23.71 with SMTP id k7mr20736558igf.26.1462196285238; Mon, 02 May 2016 06:38:05 -0700 (PDT) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id n88si16220356ioo.185.2016.05.02.06.38.04; Mon, 02 May 2016 06:38:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id C2C8761607; Mon, 2 May 2016 13:38:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 4BEC761601; Mon, 2 May 2016 13:36:28 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 66C6A61606; Mon, 2 May 2016 13:36:12 +0000 (UTC) Received: from mail-wm0-f46.google.com (mail-wm0-f46.google.com [74.125.82.46]) by lists.linaro.org (Postfix) with ESMTPS id 4D6B861607 for ; Mon, 2 May 2016 13:35:52 +0000 (UTC) Received: by mail-wm0-f46.google.com with SMTP id e201so107320648wme.0 for ; Mon, 02 May 2016 06:35:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=O/ZCGHQ3escHvs9nJJqN+zqIlzI4NijC0LUrmbPv2jU=; b=I/76yHmgUL/V0d1MEilpD3V27nEhlk0KFHF3h9+LgRMP4xKLVSl7pExIKpVy8O4FAY h5PdFNX7AqJ8Jc83n1RWSvzHIlqYuchnsEF/S11Ok4Dr8uapxIhyFG6z/rm/aAin32zg swv6uKQhEx8rEL35kqHb2Ys3ZaCkP029vKZlU/ZAbp9gbhxG4Drana8VfuwYYBoRzSWK 1pimgi0gzTtDsyN+gVmxDJCVOfeDyAgmw2b2zykCf54f3QGyJZcPkPH/XRtc3fqjpYPI ci8QdzWdREIr7WUQQRphvLJD4xIOfGor61b0HOjG4lWpzSRYGXlbCkFEBUkjKG9dTkAt dM8w== X-Gm-Message-State: AOPr4FXjOgfenWBjEuhF5oBAruThKgCw/ZD4GvywJfKyNwnXR5z5v4mH1dQuIWDjx4eFTZ37n/s= X-Received: by 10.28.177.132 with SMTP id a126mr18076715wmf.86.1462196151516; Mon, 02 May 2016 06:35:51 -0700 (PDT) Received: from localhost.localdomain ([195.55.142.58]) by smtp.gmail.com with ESMTPSA id d1sm30424544wjb.47.2016.05.02.06.35.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 02 May 2016 06:35:50 -0700 (PDT) From: Ard Biesheuvel To: linaro-uefi@lists.linaro.org Date: Mon, 2 May 2016 15:35:38 +0200 Message-Id: <1462196143-21998-3-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1462196143-21998-1-git-send-email-ard.biesheuvel@linaro.org> References: <1462196143-21998-1-git-send-email-ard.biesheuvel@linaro.org> Cc: leo.duran@amd.com Subject: [Linaro-uefi] [RFC PATCH 2/7] Platforms/AMD/Styx/Library/AmdStyxLib: use [Ppis] section as intended X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Declare the used PPI in the [Ppis] .inf section so that we don't have to define it explicitly in the code. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf | 3 +++ Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf | 3 +++ Platforms/AMD/Styx/Library/AmdStyxLib/Styx.c | 6 +----- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf b/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf index 13a58310145b..94ab49047d1e 100644 --- a/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf +++ b/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf @@ -56,6 +56,9 @@ [Guids] gAmdStyxMpCoreInfoGuid ## CONSUMER +[Ppis] + gArmMpCoreInfoPpiGuid + [FeaturePcd] gEmbeddedTokenSpaceGuid.PcdCacheEnable gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping diff --git a/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf b/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf index bcdb103d1e09..3375d79f294c 100644 --- a/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf +++ b/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf @@ -56,6 +56,9 @@ gEmbeddedTokenSpaceGuid.PcdCacheEnable gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping +[Ppis] + gArmMpCoreInfoPpiGuid + [Pcd] gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize diff --git a/Platforms/AMD/Styx/Library/AmdStyxLib/Styx.c b/Platforms/AMD/Styx/Library/AmdStyxLib/Styx.c index 8534af0347d6..79131d965e7f 100644 --- a/Platforms/AMD/Styx/Library/AmdStyxLib/Styx.c +++ b/Platforms/AMD/Styx/Library/AmdStyxLib/Styx.c @@ -142,16 +142,12 @@ PrePeiCoreGetMpCoreInfo ( } -// -// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore -// -EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID; ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { { EFI_PEI_PPI_DESCRIPTOR_PPI, - &mArmMpCoreInfoPpiGuid, + &gArmMpCoreInfoPpiGuid, &mMpCoreInfoPpi } };