| Message ID | 20230410171010.2561393-3-bhupesh.sharma@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Enable USB SS qmp phy for Qualcomm SM6115 SoC | expand |
On 10/04/2023 20:10, Bhupesh Sharma wrote: > Add USB superspeed qmp phy node to dtsi. > > Make sure that the various board dts files (which include sm4250.dtsi file) > continue to work as intended. > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > --- > .../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++ > arch/arm64/boot/dts/qcom/sm6115.dtsi | 29 +++++++++++++++++-- > .../boot/dts/qcom/sm6115p-lenovo-j606f.dts | 3 ++ > 3 files changed, 33 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts > index a1f0622db5a0..75951fd439df 100644 > --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts > +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts > @@ -242,6 +242,9 @@ &usb { > &usb_dwc3 { > maximum-speed = "high-speed"; > dr_mode = "peripheral"; > + > + phys = <&usb_hsphy>; > + phy-names = "usb2-phy"; > }; > > &usb_hsphy { > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi > index 2505c815c65a..b2ea8f13e827 100644 > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi > @@ -651,6 +651,31 @@ usb_hsphy: phy@1613000 { > status = "disabled"; > }; > > + usb_qmpphy: phy@1615000 { > + compatible = "qcom,sm6115-qmp-usb3-phy"; > + reg = <0x0 0x01615000 0x0 0x200>; > + > + clocks = <&gcc GCC_AHB2PHY_USB_CLK>, > + <&gcc GCC_USB3_PRIM_CLKREF_CLK>, > + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, > + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; > + clock-names = "cfg_ahb", > + "ref", > + "com_aux", > + "pipe"; > + > + resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>, > + <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>; > + reset-names = "phy", "phy_phy"; > + > + #clock-cells = <0>; > + clock-output-names = "usb3_phy_pipe_clk_src"; > + > + #phy-cells = <0>; > + > + status = "disabled"; Please excuse me if I'm wrong, but this will not work with the current PHY driver. It was not updated to handle new bindings. Please provide relevant driver patches too. > + }; > + > qfprom@1b40000 { > compatible = "qcom,sm6115-qfprom", "qcom,qfprom"; > reg = <0x0 0x01b40000 0x0 0x7000>; > @@ -1101,8 +1126,8 @@ usb_dwc3: usb@4e00000 { > compatible = "snps,dwc3"; > reg = <0x0 0x04e00000 0x0 0xcd00>; > interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; > - phys = <&usb_hsphy>; > - phy-names = "usb2-phy"; > + phys = <&usb_hsphy>, <&usb_ssphy>; > + phy-names = "usb2-phy", "usb3-phy"; > iommus = <&apps_smmu 0x120 0x0>; > snps,dis_u2_susphy_quirk; > snps,dis_enblslpm_quirk; > diff --git a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts > index 10c9d338446c..d60cc024749b 100644 > --- a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts > +++ b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts > @@ -280,6 +280,9 @@ &usb { > &usb_dwc3 { > maximum-speed = "high-speed"; > dr_mode = "peripheral"; > + > + phys = <&usb_hsphy>; > + phy-names = "usb2-phy"; > }; > > &usb_hsphy {
diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts index a1f0622db5a0..75951fd439df 100644 --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts @@ -242,6 +242,9 @@ &usb { &usb_dwc3 { maximum-speed = "high-speed"; dr_mode = "peripheral"; + + phys = <&usb_hsphy>; + phy-names = "usb2-phy"; }; &usb_hsphy { diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 2505c815c65a..b2ea8f13e827 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -651,6 +651,31 @@ usb_hsphy: phy@1613000 { status = "disabled"; }; + usb_qmpphy: phy@1615000 { + compatible = "qcom,sm6115-qmp-usb3-phy"; + reg = <0x0 0x01615000 0x0 0x200>; + + clocks = <&gcc GCC_AHB2PHY_USB_CLK>, + <&gcc GCC_USB3_PRIM_CLKREF_CLK>, + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "cfg_ahb", + "ref", + "com_aux", + "pipe"; + + resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>, + <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>; + reset-names = "phy", "phy_phy"; + + #clock-cells = <0>; + clock-output-names = "usb3_phy_pipe_clk_src"; + + #phy-cells = <0>; + + status = "disabled"; + }; + qfprom@1b40000 { compatible = "qcom,sm6115-qfprom", "qcom,qfprom"; reg = <0x0 0x01b40000 0x0 0x7000>; @@ -1101,8 +1126,8 @@ usb_dwc3: usb@4e00000 { compatible = "snps,dwc3"; reg = <0x0 0x04e00000 0x0 0xcd00>; interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; - phys = <&usb_hsphy>; - phy-names = "usb2-phy"; + phys = <&usb_hsphy>, <&usb_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; iommus = <&apps_smmu 0x120 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; diff --git a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts index 10c9d338446c..d60cc024749b 100644 --- a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts +++ b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts @@ -280,6 +280,9 @@ &usb { &usb_dwc3 { maximum-speed = "high-speed"; dr_mode = "peripheral"; + + phys = <&usb_hsphy>; + phy-names = "usb2-phy"; }; &usb_hsphy {
Add USB superspeed qmp phy node to dtsi. Make sure that the various board dts files (which include sm4250.dtsi file) continue to work as intended. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> --- .../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++ arch/arm64/boot/dts/qcom/sm6115.dtsi | 29 +++++++++++++++++-- .../boot/dts/qcom/sm6115p-lenovo-j606f.dts | 3 ++ 3 files changed, 33 insertions(+), 2 deletions(-)