[Linaro-uefi,3/4] Platforms/AMD/Styx: reallocate the in-memory copy of the varstore FV

Message ID 1462545180-7941-4-git-send-email-ard.biesheuvel@linaro.org
State New
Headers show

Commit Message

Ard Biesheuvel May 6, 2016, 2:32 p.m.
Before the DXE core has a chance to overwrite the in-memory copy of
the varstore FV, relocate it to a dynamically allocated buffer. Note
that, while this allocation is not made from the temporary PEI heap,
the bookkeeping involved in calling AllocateAlignedRuntimePages()
appears to push the envelope slightly, and so we need to increase the
initial stack size (which is actually stack + heap)

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc                  |  5 ++-
 Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c   | 41 ++++++++++++++++++++
 Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf |  9 +++++
 Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc          |  6 ++-
 4 files changed, 59 insertions(+), 2 deletions(-)

Patch

diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc
index 892068f62025..458b444159fc 100644
--- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc
+++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc
@@ -401,7 +401,7 @@  DEFINE TRANS_CODE = $(EL3_TO_EL2)
 
   # Stacks for MPCores in Normal World
   gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x8001680000
-  gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x6000
+  gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000
   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x800
 
   # Stacks for MPCores in Monitor Mode
@@ -537,6 +537,9 @@  DEFINE TRANS_CODE = $(EL3_TO_EL2)
   gAmdModulePkgTokenSpaceGuid.PcdEthMacB|0x02B1B2B3B4B5
 !endif
 
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0x0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0
 
 ################################################################################
 #
diff --git a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c
index 971e3a193d91..4f7f6bb1c942 100644
--- a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c
+++ b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c
@@ -24,6 +24,7 @@ 
 #include <PiPei.h>
 
 #include <Library/ArmPlatformLib.h>
+#include <Library/BaseMemoryLib.h>
 #include <Library/DebugLib.h>
 #include <Library/HobLib.h>
 #include <Library/MemoryAllocationLib.h>
@@ -56,6 +57,44 @@  InitMmu (
   }
 }
 
+STATIC
+VOID
+MoveNvStoreImage (
+  VOID
+  )
+{
+  VOID      *OldBase, *NewBase;
+  UINTN     Size;
+
+  //
+  // Move the in-memory image of the NV store firmware volume to a dynamically
+  // allocated buffer. This gets rid of the annoying static memory reservation
+  // at the base of memory where all other UEFI allocations are near the top.
+  //
+  OldBase = (VOID *)FixedPcdGet64 (PcdFlashNvStorageOriginalBase);
+
+  Size = FixedPcdGet32 (PcdFlashNvStorageVariableSize) +
+         FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) +
+         FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize);
+
+  NewBase = AllocateAlignedRuntimePages (EFI_SIZE_TO_PAGES (Size), SIZE_64KB);
+  ASSERT (NewBase != NULL);
+
+  CopyMem (NewBase, OldBase, Size);
+
+  DEBUG ((EFI_D_INFO, "%a: Relocating NV store FV from %p to %p\n",
+    __FUNCTION__, OldBase, NewBase));
+
+  PcdSet64 (PcdFlashNvStorageVariableBase64, (UINT64)NewBase);
+
+  PcdSet64 (PcdFlashNvStorageFtwWorkingBase64, (UINT64)NewBase +
+    FixedPcdGet32 (PcdFlashNvStorageVariableSize));
+
+  PcdSet64 (PcdFlashNvStorageFtwSpareBase64, (UINT64)NewBase +
+    FixedPcdGet32 (PcdFlashNvStorageVariableSize) +
+    FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize));
+}
+
 /*++
 
 Routine Description:
@@ -135,5 +174,7 @@  MemoryPeim (
     BuildMemoryTypeInformationHob ();
   }
 
+  MoveNvStoreImage ();
+
   return EFI_SUCCESS;
 }
diff --git a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf
index c1cca09da3ff..8b35d9f604be 100644
--- a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf
+++ b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf
@@ -80,9 +80,18 @@ 
   gAmdStyxTokenSpaceGuid.PcdNsISCPMemoryBase
   gAmdStyxTokenSpaceGuid.PcdNsISCPMemorySize
 
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+  gAmdStyxTokenSpaceGuid.PcdFlashNvStorageOriginalBase
+
 [Pcd]
   gArmTokenSpaceGuid.PcdSystemMemoryBase
   gArmTokenSpaceGuid.PcdSystemMemorySize
 
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64
+
 [Depex]
   gAmdStyxPlatInitPpiGuid
diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
index 32d97c017b46..60d1c8ecbbaf 100644
--- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
@@ -404,7 +404,7 @@  DEFINE TRANS_CODE = $(EL3_TO_EL2)
 
   # Stacks for MPCores in Normal World
   gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x8001680000
-  gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x6000
+  gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000
   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x800
 
   # Stacks for MPCores in Monitor Mode
@@ -549,6 +549,10 @@  DEFINE TRANS_CODE = $(EL3_TO_EL2)
   gAmdModulePkgTokenSpaceGuid.PcdEthMacB|0x02B1B2B3B4B5
 !endif
 
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0x0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0
+
 
 ################################################################################
 #