diff mbox

[RFC,09/21] clk: uniphier: add clock driver for UniPhier PH1-LD20 SoC

Message ID 1462873862-30940-10-git-send-email-yamada.masahiro@socionext.com
State New
Headers show

Commit Message

Masahiro Yamada May 10, 2016, 9:50 a.m. UTC
This series is just for review.
Please do not apply this patch.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

---

 drivers/clk/uniphier/Kconfig             |  4 ++
 drivers/clk/uniphier/Makefile            |  1 +
 drivers/clk/uniphier/clk-uniphier-ld20.c | 83 ++++++++++++++++++++++++++++++++
 3 files changed, 88 insertions(+)
 create mode 100644 drivers/clk/uniphier/clk-uniphier-ld20.c

-- 
1.9.1


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diff mbox

Patch

diff --git a/drivers/clk/uniphier/Kconfig b/drivers/clk/uniphier/Kconfig
index 1746aea..6e0a311 100644
--- a/drivers/clk/uniphier/Kconfig
+++ b/drivers/clk/uniphier/Kconfig
@@ -30,4 +30,8 @@  config CLK_UNIPHIER_LD11
 	tristate "Clock driver for UniPhier PH1-LD11 SoC"
 	default ARM64
 
+config CLK_UNIPHIER_LD20
+	tristate "Clock driver for UniPhier PH1-LD20 SoC"
+	default ARM64
+
 endif
diff --git a/drivers/clk/uniphier/Makefile b/drivers/clk/uniphier/Makefile
index e056771..59272a6 100644
--- a/drivers/clk/uniphier/Makefile
+++ b/drivers/clk/uniphier/Makefile
@@ -10,3 +10,4 @@  obj-$(CONFIG_CLK_UNIPHIER_SLD8)	+= clk-uniphier-sld8.o
 obj-$(CONFIG_CLK_UNIPHIER_PRO5)	+= clk-uniphier-pro5.o
 obj-$(CONFIG_CLK_UNIPHIER_PXS2)	+= clk-uniphier-pxs2.o
 obj-$(CONFIG_CLK_UNIPHIER_LD11)	+= clk-uniphier-ld11.o
+obj-$(CONFIG_CLK_UNIPHIER_LD20)	+= clk-uniphier-ld20.o
diff --git a/drivers/clk/uniphier/clk-uniphier-ld20.c b/drivers/clk/uniphier/clk-uniphier-ld20.c
new file mode 100644
index 0000000..a15a59b
--- /dev/null
+++ b/drivers/clk/uniphier/clk-uniphier-ld20.c
@@ -0,0 +1,83 @@ 
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#include "clk-uniphier.h"
+
+static const struct uniphier_clk_data uniphier_ld20_clk_data[] = {
+	{
+		.name = "spll",
+		.type = UNIPHIER_CLK_TYPE_FIXED_FACTOR,
+		.output_index = -1,
+		.data.factor = {
+			.parent_name = "ref",
+			.mult = 80,
+			.div = 1,
+		},
+	},
+	{
+		.name = "uart",
+		.type = UNIPHIER_CLK_TYPE_FIXED_FACTOR,
+		.output_index = 0,
+		.data.factor = {
+			.parent_name = "spll",
+			.mult = 1,
+			.div = 34,
+		},
+	},
+	{
+		.name = "fi2c",
+		.type = UNIPHIER_CLK_TYPE_FIXED_FACTOR,
+		.output_index = 1,
+		.data.factor = {
+			.parent_name = "spll",
+			.mult = 1,
+			.div = 50,
+		},
+	},
+	{
+		.name = "stdmac",
+		.type = UNIPHIER_CLK_TYPE_GATE,
+		.output_index = 7,
+		.data.gate = {
+			.parent_name = NULL,
+			.reg = 0x200c,
+			.mask = BIT(8),
+			.enable_val = BIT(8),
+		},
+	},
+	{ /* sentinel */ }
+};
+
+static int uniphier_ld20_clk_probe(struct platform_device *pdev)
+{
+	return uniphier_clk_probe(pdev, uniphier_ld20_clk_data);
+}
+
+static struct platform_driver uniphier_ld20_clk_driver = {
+	.probe = uniphier_ld20_clk_probe,
+	.remove = uniphier_clk_remove,
+	.driver = {
+		.name = "uniphier-ld20-clk",
+	},
+};
+module_platform_driver(uniphier_ld20_clk_driver);
+
+MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>");
+MODULE_DESCRIPTION("UniPhier PH1-LD20 System Clock Driver");
+MODULE_LICENSE("GPL");