From patchwork Tue May 10 12:11:49 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 67446 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp2092398qge; Tue, 10 May 2016 05:15:35 -0700 (PDT) X-Received: by 10.140.81.167 with SMTP id f36mr39939359qgd.63.1462882535538; Tue, 10 May 2016 05:15:35 -0700 (PDT) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id j44si1193768qgd.86.2016.05.10.05.15.35; Tue, 10 May 2016 05:15:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 331626163F; Tue, 10 May 2016 12:15:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 075F16165C; Tue, 10 May 2016 12:13:47 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 412736165E; Tue, 10 May 2016 12:13:35 +0000 (UTC) Received: from mail-wm0-f42.google.com (mail-wm0-f42.google.com [74.125.82.42]) by lists.linaro.org (Postfix) with ESMTPS id DEC286165C for ; Tue, 10 May 2016 12:12:17 +0000 (UTC) Received: by mail-wm0-f42.google.com with SMTP id n129so175757502wmn.1 for ; Tue, 10 May 2016 05:12:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UAKNf+h/8fRRL5JX3HIC74t3iL1OgkXvxlREwQl1no4=; b=iWZuqTXR7wnyPXlS3yKwZpAItHxudfwzW4TFa1dKmdoc5moOg5AVqgJA1akD09++MC /Gc8s7Iu+RXMvJkbdqiy688dnvJ9yR4VdBBm3F1oJETz7YuUu4Ti2XDoS1TxXx0QU2lQ aZqsiMqQEEeSramgiKphBwnUAjhPw4EZTQJSF01teVYTUvbaGFbbs+B3Y/P0JRMiJpe8 v+xzuy689IQ3ajAEL7L2JxnRJBT1FVEykiJQvlLw8in2PXkRJ7WokYwzuf/CSOHjbNms Kecf97ppFKgeLaWXlBS+bdvLnRRG/H9s0H1X2SP676kqcvpim2h74PKDGFOHiOVMKM8b 5zwA== X-Gm-Message-State: AOPr4FUB5qU9MQX9UoW7v+iGh53hedwmE92gjcgPO2tMQBEMG007O85+9Eoxpeuu1OVMp7vmm3M= X-Received: by 10.194.22.167 with SMTP id e7mr38607265wjf.9.1462882337024; Tue, 10 May 2016 05:12:17 -0700 (PDT) Received: from localhost.localdomain ([195.55.142.58]) by smtp.gmail.com with ESMTPSA id m20sm2623084wma.23.2016.05.10.05.12.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 10 May 2016 05:12:16 -0700 (PDT) From: Ard Biesheuvel To: linaro-uefi@lists.linaro.org Date: Tue, 10 May 2016 14:11:49 +0200 Message-Id: <1462882313-7637-11-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1462882313-7637-1-git-send-email-ard.biesheuvel@linaro.org> References: <1462882313-7637-1-git-send-email-ard.biesheuvel@linaro.org> Cc: leo.duran@amd.com Subject: [Linaro-uefi] [PATCH 10/14] Platforms/AMD/Styx/AcpiPlatformDxe: use dynamically allocated pen X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Now that the ACPI parking protocol pen is allocated in the same module that populates the MADT table, we can simply use a dynamic allocation rather than using an a priori fixed address. This is better for two reasons: - the static allocation could potentially be occupied by the time we try to allocate it, - it allows the DXE core to group the allocation with other allocations of the same type, which reduces memory map fragmentation. Also change the type of the allocation to reserved memory. Otherwise, it will be mapped cacheable during UEFI Runtime Service invocations by the OS, which conflicts with the uncached mappings mandated by the ACPI parking protocol. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- Platforms/AMD/Styx/AcpiTables/AcpiTables.inf | 1 - Platforms/AMD/Styx/AcpiTables/Madt.c | 16 +++++++++------- Platforms/AMD/Styx/AmdStyx.dec | 3 +-- Platforms/AMD/Styx/Common/AmdStyxAcpiLib.h | 2 +- Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c | 14 ++++++++++++-- Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf | 1 - Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.c | 12 +----------- Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.h | 2 +- 8 files changed, 25 insertions(+), 26 deletions(-) diff --git a/Platforms/AMD/Styx/AcpiTables/AcpiTables.inf b/Platforms/AMD/Styx/AcpiTables/AcpiTables.inf index de5c20100734..e0e9c40f6599 100644 --- a/Platforms/AMD/Styx/AcpiTables/AcpiTables.inf +++ b/Platforms/AMD/Styx/AcpiTables/AcpiTables.inf @@ -86,5 +86,4 @@ gAmdStyxTokenSpaceGuid.PcdPsciOsSupport gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport gAmdStyxTokenSpaceGuid.PcdParkingProtocolVersion - gAmdStyxTokenSpaceGuid.PcdParkingProtocolBase diff --git a/Platforms/AMD/Styx/AcpiTables/Madt.c b/Platforms/AMD/Styx/AcpiTables/Madt.c index ac98693d5f0f..0fe3d9e1b611 100644 --- a/Platforms/AMD/Styx/AcpiTables/Madt.c +++ b/Platforms/AMD/Styx/AcpiTables/Madt.c @@ -52,11 +52,11 @@ #endif #define PARKING_PROTOCOL_VERSION (FixedPcdGet32 (PcdParkingProtocolVersion)) -#define PARKED_BASE_ADDRESS (FixedPcdGet64 (PcdParkingProtocolBase)) #define PARKED_OFFSET ( 4096 ) #define CORES_PER_CLUSTER (FixedPcdGet32 (PcdSocCoresPerCluster)) -#define PARKED_ADDRESS(ClusterId, CoreId) (PARKED_BASE_ADDRESS + (CORES_PER_CLUSTER * ClusterId + CoreId) * PARKED_OFFSET) +#define PARKED_ADDRESS(Base, ClusterId, CoreId) \ + ((Base) + (CORES_PER_CLUSTER * ClusterId + CoreId) * PARKED_OFFSET) /* Macro to populate EFI_ACPI_5_1_GIC_STRUCTURE */ @@ -69,7 +69,7 @@ EFI_ACPI_5_1_GIC_ENABLED, /* UINT32 Flags */ \ PARKING_PROTOCOL_VERSION, /* UINT32 ParkingProtocolVersion */ \ PerfInt, /* UINT32 PerformanceInterruptGsiv */ \ - PARKED_ADDRESS(ClusterId, CoreId), /* UINT64 ParkedAddress */ \ + 0, /* UINT64 ParkedAddress */ \ GIC_BASE, /* UINT64 PhysicalBaseAddress */ \ GICV_BASE, /* UINT64 GICV */ \ GICH_BASE, /* UINT64 GICH */ \ @@ -188,7 +188,8 @@ BuildGicC ( EFI_ACPI_5_1_GIC_STRUCTURE *GicC, UINT32 CpuNum, UINT32 ClusterId, - UINT32 CoreId + UINT32 CoreId, + EFI_PHYSICAL_ADDRESS MpParkingBase ) { UINT32 MpId, PmuSpi; @@ -206,7 +207,7 @@ BuildGicC ( GicC->AcpiProcessorUid = MpId; GicC->Flags = EFI_ACPI_5_1_GIC_ENABLED; GicC->ParkingProtocolVersion = PARKING_PROTOCOL_VERSION; - GicC->ParkedAddress = PARKED_ADDRESS(ClusterId, CoreId); + GicC->ParkedAddress = PARKED_ADDRESS(MpParkingBase, ClusterId, CoreId); GicC->PhysicalBaseAddress = GIC_BASE; GicC->GICV = GICV_BASE; GicC->GICH = GICH_BASE; @@ -265,7 +266,7 @@ BuildGicM ( EFI_ACPI_DESCRIPTION_HEADER * MadtHeader ( - VOID + UINT64 MpParkingBase ) { EFI_ACPI_5_1_GIC_STRUCTURE *GicC; @@ -292,7 +293,8 @@ MadtHeader ( Status = BuildGicC (GicC, CpuNum, ArmCoreInfoTable[CpuNum].ClusterId, - ArmCoreInfoTable[CpuNum].CoreId + ArmCoreInfoTable[CpuNum].CoreId, + MpParkingBase ); ASSERT_EFI_ERROR (Status); diff --git a/Platforms/AMD/Styx/AmdStyx.dec b/Platforms/AMD/Styx/AmdStyx.dec index 3bdb4f83f858..bec1d21ee4bb 100644 --- a/Platforms/AMD/Styx/AmdStyx.dec +++ b/Platforms/AMD/Styx/AmdStyx.dec @@ -108,8 +108,7 @@ # UEFI entry point gAmdStyxTokenSpaceGuid.PcdUefiEntryAddress|0x8000E80000|UINT64|0x000a0000 - # Parking Protocol (re-use 32K at start of DRAM) + # Parking Protocol gAmdStyxTokenSpaceGuid.PcdParkingProtocolVersion|1|UINT32|0x000b0000 - gAmdStyxTokenSpaceGuid.PcdParkingProtocolBase|0x8000E80000|UINT64|0x000b0001 gAmdStyxTokenSpaceGuid.PcdParkingProtocolSize|0x0000008000|UINT64|0x000b0002 diff --git a/Platforms/AMD/Styx/Common/AmdStyxAcpiLib.h b/Platforms/AMD/Styx/Common/AmdStyxAcpiLib.h index f2de82e3860c..6d6ca03ae5a2 100644 --- a/Platforms/AMD/Styx/Common/AmdStyxAcpiLib.h +++ b/Platforms/AMD/Styx/Common/AmdStyxAcpiLib.h @@ -26,7 +26,7 @@ EFI_ACPI_DESCRIPTION_HEADER *FadtTable (void); EFI_ACPI_DESCRIPTION_HEADER *FacsTable (void); -EFI_ACPI_DESCRIPTION_HEADER *MadtHeader (void); +EFI_ACPI_DESCRIPTION_HEADER *MadtHeader (UINT64 MpParkingBase); EFI_ACPI_DESCRIPTION_HEADER *GtdtHeader (void); EFI_ACPI_DESCRIPTION_HEADER *DsdtHeader (void); EFI_ACPI_DESCRIPTION_HEADER *McfgHeader (void); diff --git a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c index 3b3d36eea007..5c6a00e9eef8 100644 --- a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c +++ b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c @@ -55,11 +55,21 @@ AcpiPlatformEntryPoint ( EFI_ACPI_TABLE_PROTOCOL *AcpiTable; UINTN TableHandle; UINTN TableIndex; + EFI_PHYSICAL_ADDRESS MpParkingBase; // Move secondary cores to a Pen compliant with MP-Parking protocol if (!FixedPcdGetBool (PcdPsciOsSupport) && FixedPcdGetBool (PcdTrustedFWSupport)) { - AmdStyxParkSecondaryCores(); + + // Allocate Parking area (4KB-aligned, 4KB per core) as Reserved memory + Status = gBS->AllocatePages (AllocateAnyPages, EfiReservedMemoryType, + EFI_SIZE_TO_PAGES (FixedPcdGet64 (PcdParkingProtocolSize)), + &MpParkingBase); + ASSERT_EFI_ERROR (Status); + + AmdStyxParkSecondaryCores(MpParkingBase); + } else { + MpParkingBase = 0; } ZeroMem(AcpiTableList, sizeof(AcpiTableList)); @@ -67,7 +77,7 @@ AcpiPlatformEntryPoint ( TableIndex = 0; AcpiTableList[TableIndex++] = FadtTable(); AcpiTableList[TableIndex++] = DsdtHeader(); - AcpiTableList[TableIndex++] = MadtHeader(); + AcpiTableList[TableIndex++] = MadtHeader(MpParkingBase); AcpiTableList[TableIndex++] = GtdtHeader(); AcpiTableList[TableIndex++] = Dbg2Header(); AcpiTableList[TableIndex++] = SpcrHeader(); diff --git a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf index 6a3d6ec0e949..931a86ed0123 100644 --- a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf +++ b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf @@ -54,7 +54,6 @@ [FixedPcd] gAmdStyxTokenSpaceGuid.PcdParkingProtocolVersion - gAmdStyxTokenSpaceGuid.PcdParkingProtocolBase gAmdStyxTokenSpaceGuid.PcdParkingProtocolSize gAmdStyxTokenSpaceGuid.PcdPsciOsSupport gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport diff --git a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.c b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.c index be85f3f442f0..98bdd53a82cc 100644 --- a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.c +++ b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.c @@ -69,11 +69,9 @@ AmdStyxBringupSecondary ( VOID EFIAPI AmdStyxParkSecondaryCores ( - VOID + EFI_PHYSICAL_ADDRESS MpParkingBase ) { - EFI_STATUS Status; - EFI_PHYSICAL_ADDRESS MpParkingBase; UINTN MpParkingSize; EFI_PHYSICAL_ADDRESS PenBase; UINTN PenSize; @@ -88,9 +86,6 @@ AmdStyxParkSecondaryCores ( ArmCoreInfoTable = AmdStyxGetArmCoreInfoTable (&ArmCoreCount); ASSERT (ArmCoreInfoTable != NULL); - // Get Parking area (4KB-aligned, 4KB per core) - MpParkingBase = FixedPcdGet64 (PcdParkingProtocolBase); - ASSERT ((MpParkingBase & (SIZE_4KB - 1)) == 0); MpParkingSize = ArmCoreCount * SIZE_4KB; ASSERT (MpParkingSize <= FixedPcdGet64 (PcdParkingProtocolSize)); @@ -102,11 +97,6 @@ AmdStyxParkSecondaryCores ( PenBase = (EFI_PHYSICAL_ADDRESS)((UINTN)MpParkingBase + SIZE_2KB + sizeof(UINT64)); PenSize = (UINTN)&SecondariesPenEnd - (UINTN)&SecondariesPenStart; - // Reserve the memory as RuntimeServices - Status = gBS->AllocatePages (AllocateAddress, EfiRuntimeServicesCode, - EFI_SIZE_TO_PAGES (MpParkingSize ), &MpParkingBase ); - ASSERT_EFI_ERROR (Status); - // Relocate the Pen code CopyMem ((VOID*)(PenBase), (VOID*)&SecondariesPenStart, PenSize); diff --git a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.h b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.h index fb79a803026d..05a63f2fba2b 100644 --- a/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.h +++ b/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformParkingProtocol.h @@ -15,5 +15,5 @@ VOID EFIAPI AmdStyxParkSecondaryCores ( - VOID + EFI_PHYSICAL_ADDRESS MpParkingBase );