| Message ID | 20230421223204.115500-1-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted |
| Commit | d2bd947176f855ea5a07fa9cce7bf15b0ce0467f |
| Headers | show |
| Series | arm64: dts: imx: add missing cache properties | expand |
On 4/22/2023 6:32 AM, Krzysztof Kozlowski wrote: > As all level 2 and level 3 caches are unified, add required > cache-unified properties to fix warnings like: > > imx8dxl-evk.dtb: l2-cache0: 'cache-unified' is a required property > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Peng Fan <peng.fan@nxp.com> > > --- > > Please take the patch via sub-arch SoC tree. > --- > arch/arm64/boot/dts/freescale/imx8dxl.dtsi | 1 + > arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8dxl.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl.dtsi > index 70fadd79851a..792b7224ca5b 100644 > --- a/arch/arm64/boot/dts/freescale/imx8dxl.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8dxl.dtsi > @@ -60,6 +60,7 @@ A35_1: cpu@1 { > A35_L2: l2-cache0 { > compatible = "cache"; > cache-level = <2>; > + cache-unified; > }; > }; > > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > index 32193a43ff49..57627bdaa851 100644 > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > @@ -52,6 +52,7 @@ A35_1: cpu@1 { > A35_L2: l2-cache0 { > compatible = "cache"; > cache-level = <2>; > + cache-unified; > }; > }; >
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl.dtsi index 70fadd79851a..792b7224ca5b 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8dxl.dtsi @@ -60,6 +60,7 @@ A35_1: cpu@1 { A35_L2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index 32193a43ff49..57627bdaa851 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -52,6 +52,7 @@ A35_1: cpu@1 { A35_L2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; }; };
As all level 2 and level 3 caches are unified, add required cache-unified properties to fix warnings like: imx8dxl-evk.dtb: l2-cache0: 'cache-unified' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Please take the patch via sub-arch SoC tree. --- arch/arm64/boot/dts/freescale/imx8dxl.dtsi | 1 + arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 1 + 2 files changed, 2 insertions(+)